TDA8295 Datasheet, PDF (50/77 Pages) NXP Semiconductors – Digital global standard low IF demodulator for analog TV and FM radio

NXP Semiconductors
TDA8295
Digital global standard low IF demodulator for analog TV and FM radio
Table 63. GPIOREG_1 register (address 45h) bit description …continued
Legend: * = default value.
Bit
Symbol
Access Value Description
3 to 0 GP2_CF[3:0] R/W
It determines how the general purpose pin GPIO2 is
configured.
0000
The GPIO2 pin is in Input mode. The input value is
stored in GP2_VAL.
0001*
The GPIO2 pin is in Open-drain mode. The output
value is determined by GP2_VAL.
0011
The GPIO2 pin is in Output mode. The PLL output
clock divided by two is delivered.
0100
to
1011
The GPIO2 pin is in Output mode. HVPLL signals are
delivered. The output is a one bit signal of
HVPLL_BUS[7:0] according to Table 64.
XXXX
Don’t care if I2CSW_EN = 1. Then the pad is
configured as I²C-bus feed-through.
Table 64. HVPLL bus mapping
HVPLL_BUS bit
HVPLL_BUS[7]
HVPLL_BUS[6]
HVPLL_BUS[5]
HVPLL_BUS[4]
HVPLL_BUS[3]
HVPLL_BUS[2]
HVPLL_BUS[1]
HVPLL_BUS[0]
Signal
V_SYNC
H_SYNC
NOISE_DET
MAC_DET
FIDT
V_LOCK
F_H_LOCK
N_H_LOCK
Table 65. GPIOREG_2 register (address 46h) bit description
Legend: * = default value.
Bit
Symbol
Access Value Description
7
CLK_INV_GP2 R/W 0*
With CLK_INV_GPx, the output clock polarity can be
6
CLK_INV_GP1 R/W 0*
changed. This is only useful when
GPx_CF[3:0] = 0011.
5
CLK_INV_GP0 R/W 0*
4 and 3 -
R/W -
not used
2
GP2_VAL
R/W 1*
GP2_VAL controls the value of the pin GPIO2 when
GP2_CF[3:0] = 0001. When GP2_CF[3:0] = 0000,
GPIO2 is an input pin which value can be read
through the I²C-bus stored in GP2_VAL.
1
GP1_VAL
R/W 1*
GP1_VAL controls the value of the pin GPIO1 when
GP1_CF[3:0] = 0001. When GP1_CF[3:0] = 0000,
GPIO1 is an input pin which value can be read
through the I²C-bus stored in GP1_VAL.
0
GP0_VAL
R/W 1*
GP0_VAL controls the value of the pin GPIO0 when
GP0_CF[3:0] = 0001. When GP0_CF[3:0] = 0000,
GPIO0 is an input pin which value can be read
through the I²C-bus stored in GP0_VAL.
TDA8295_1
Product data sheet
Rev. 01 — 4 February 2008
© NXP B.V. 2008. All rights reserved.
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