TDA6650ATT Datasheet, PDF (40/54 Pages) NXP Semiconductors – 5 V mixer/oscillator and low noise PLL synthesizer for hybrid terrestrial tuner (digital and analog)

NXP Semiconductors
TDA6650ATT; TDA6651ATT
5 V mixer/oscillator and low noise PLL synthesizer
The TDA6650ATT; TDA6651ATT PLL loop stability is guaranteed in the configuration of
the Figure 27 to Figure 30. In this configuration, the external supply source is 30 V
minimum, the pull-up resistor, R19 is 15 kΩ and all of the local oscillators are aligned to
operate at a maximum tuning voltage of 26 V. If the configuration is changed, there might
be an impact on the loop stability.
For any other configurations, a stability analysis must be performed. The conventional PLL
AC model used for the stability analysis, is valid provided the external source (DC supply
source or DC-to-DC converter) is able to deliver a minimum current that is equal to the
charge pump current in use.
The delivered current can be simply calculated with the following formula:
I_delivered
=


V_{-----D---R-C----p-}–_-u---V_{----T--}
>
I_CP
(1)
where:
I_delivered is the delivered current.
V_DC is the supply source voltage or DC-to-DC converter output voltage.
V_T is the tuning voltage.
R_pu is the pull-up resistor between the DC supply source (or the DC-to-DC converter
output) and the tuning line (R19 in Figure 27 to Figure 30).
I_CP is the charge pump current in use.
TDA6650ATT_6651ATT_2
Product data sheet
Rev. 02 — 2 February 2007
© NXP B.V. 2007. All rights reserved.
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