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TDA6650ATT Datasheet, PDF (11/54 Pages) NXP Semiconductors – 5 V mixer/oscillator and low noise PLL synthesizer for hybrid terrestrial tuner (digital and analog)
NXP Semiconductors
TDA6650ATT; TDA6651ATT
5 V mixer/oscillator and low noise PLL synthesizer
Table 10.
R2
0
0
0
0
1
1
1
1
Reference divider ratio select bits
R1
R0
Reference divider Frequency
ratio
comparison
0
0
2
2 MHz
0
1
1
4 MHz
1
0
1
4 MHz
1
1
4
1 MHz
0
0
1
4 MHz
0
1
-
-
1
0
-
-
1
1
-
-
Frequency step
62.5 kHz
142.86 kHz
166.67 kHz
50 kHz
125 kHz
reserved
reserved
reserved
8.1.4 AGC detector setting
The AGC take-over point can be selected out of 6 levels according to Table 11.
Table 11.
AL2
0
0
0
0
1
1
1
1
AGC programming
AL1
AL0
0
0
0
1
1
0
1
1
0
0
0
1
1
0
1
1
Typical take-over point level
[1] 124 dBµV (p-p)
[1] 121 dBµV (p-p)
[1] 118 dBµV (p-p)
[2] 115 dBµV (p-p)
[2] 112 dBµV (p-p)
[2] 109 dBµV (p-p)
[3] IAGC = 0 A
[4] VAGC = 3.5 V
[1] This take-over point is available for both symmetrical and asymmetrical modes.
[2] This take-over point is available for asymmetrical mode only.
[3] The AGC current sources are disabled. The AGC output goes into a high-impedance state and an external
AGC source can be connected in parallel and will not be influenced.
[4] The AGC detector is disabled and IAGC = 9 µA.
8.1.5 Charge pump current setting
The charge pump current can be chosen from 8 values depending on the value of bits
CP2, CP1 and CP0 bits; see Table 12.
Table 12. Charge pump current
CP2
CP1
CP0
0
0
0
0
0
1
0
1
0
0
1
1
1
0
0
Charge pump current
number
1
2
3
4
5
Typical current (absolute
value in µA)
38
54
83
122
163
TDA6650ATT_6651ATT_2
Product data sheet
Rev. 02 — 2 February 2007
© NXP B.V. 2007. All rights reserved.
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