TDA6650ATT Datasheet, PDF (13/54 Pages) NXP Semiconductors – 5 V mixer/oscillator and low noise PLL synthesizer for hybrid terrestrial tuner (digital and analog)

NXP Semiconductors
TDA6650ATT; TDA6651ATT
5 V mixer/oscillator and low noise PLL synthesizer
Table 15. ADC levels …continued
Voltage applied to pin ADC^[1]
0.3V_CC to 0.45V_CC
0.15V_CC to 0.3V_CC
0 V to 0.15V_CC
A2
A1
A0
0
1
0
0
0
1
0
0
0
[1] Accuracy is ±0.03V_CC. Bit BS5 must be set to logic 0 to disable the BS5 output port. The BS5 output port
uses the same pin as the ADC and can not be used when the ADC is in use.
8.3 Status at power-on reset
At power on or when the supply voltage drops below approximately 2.85 V (at
T_amb = 25 °C), internal registers are set according to Table 16.
At power on, the charge pump current is set to 580 µA, the test bits T[2:0] are set to 110
which means that the charge pump is sinking current, the tuning voltage output is
disabled. The XTOUT buffer is on, driving the 4 MHz signal from the crystal oscillator and
all the ports are off. As a consequence, the high band is selected by default.
Table 16. Default setting at power-on reset
Name
Byte Bit^[1]
MSB
Address byte
1
1
1
Divider byte 1 (DB1) 2
0
N14 = X
Divider byte 2 (DB2) 3
N7 = X N6 = X
Control byte 1 (CB1) 4
1
T/A = X^[2]
1
T/A = X^[3]
Control byte 2 (CB2) 5
CP2 = 1 CP1 = 1
0
N13 = X
N5 = X
T2 = 1
0
CP0 = 1
0
N12 = X
N4 = X
T1 = 1
0
BS5 = 0
0
N11 = X
N3 = X
T0 = 0
ATC = 0
BS4 = 0
MA1
N10 = X
N2 = X
R2 = X
AL2 = 0
BS3 = 0
MA0
N9 = X
N1 = X
R1 = X
AL1 = 1
BS2 = 0
LSB
X
N8 = X
N0 = X
R0 = X
AL0 = 0
BS1 = 0
[1] X means that this bit is not set or reset at power-on reset.
[2] The next six bits are written, when bit T/A = 1 in a write sequence.
[3] The next six bits are written, when bit T/A = 0 in a write sequence.
TDA6650ATT_6651ATT_2
Product data sheet
Rev. 02 — 2 February 2007
© NXP B.V. 2007. All rights reserved.
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