PC87363 Datasheet, PDF (94/200 Pages) National Semiconductor (TI) – 128-Pin LPC SuperI/O with MIDI and Game Ports, Extended Wake-Up and Protection

3.0 System Wake-Up Control (SWC) (Continued)
3.4.13 Wake-Up Extension 2 Enable Register 0 (WK_X2EN0)
This register is set to 1Fh on power-up of V_PP or software reset. It controls the routing of raw wake-up events to event de-
tectors while V_DD is not present. Wake-up events that are enabled are routed to their event detectors while V_DD is not
present.
Location: Bank 2, Offset 19h
Type:
R/W
Bit
Name
Reset
7
6
5
4
3
2
1
0
Reserved
CEIR
Mouse
KBD
RI2
RI1
Event Ex. 2 Event Ex. 2 Event Ex. 2 Event Ex. 2 Event Ex. 2
Enable
Enable
Enable
Enable
Enable
0
0
0
1
1
1
1
1
Bit
7-5 Reserved
4 CEIR Event Extension 2 Enable
0: Disabled
1: Enabled (default)
3 Mouse Event Extension 2 Enable
0: Disabled
1: Enabled (default)
2 KBD Event Extension 2 Enable
0: Disabled
1: Enabled (default)
1 RI2 Event Extension 2 Enable
0: Disabled
1: Enabled (default)
0 RI1 Event Extension 2 Enable
0: Disabled
1: Enabled (default)
Description
94
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