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LMH1982 Datasheet, PDF (6/28 Pages) National Semiconductor (TI) – Multi-Rate Video Clock Generator with Genlock
Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
ESD Tolerance (Note 2)
Human Body Model
Machine Model
Supply Voltage, VDD
Supply Voltage, DVDD
Input Voltage Range (any input)
2000V
200V
3.6V
2.75V
−0.3V to VDD +0.3V
Electrical Characteristics
Storage Temperature Range
Lead Temperature (Soldering 10 sec.)
Junction Temperature, TJMAX
Thermal Resistance (θJA)
Operating Ratings
VDD
DVDD
Input Voltage
Temperature Range, TA
−65°C to +150°C
300°C
150°C
33°C/W
3.3V ± 5%
2.5V ± 5%
0V to VDD
0°C to 70°C
Unless otherwise specified, all limits are guaranteed for TA = 25°C, VDD = 3.3V, DVDD = 2.5V, Boldface limits apply at the tem-
perature extremes.
Symbol
Parameter
Conditions
Min
Typ
Max
Units
IVDD VDD Supply Current
IDVDD DVDD Supply Current
Free Run Voltage Control Input (Pin 1)
Default Register Values
Default Register Values
50
mA
35
mA
VIL Low Analog Input Voltage
VIH High Analog Input Voltage
Reference Inputs (Pins 4, 5, 7, 8)
(Note 3)
(Note 3)
0
V
VDD
V
VIL
VIH
ΔTHV
Low Input Voltage
High Input Voltage
H-V Timing Offset
IIN = ±10 μA
0
IIN = ±10 µA
2.0
(Note 4), Timing offset measured from H sync
to V sync pulse leading edges
0.8
V
VDD
V
2.0
μs
Digital Control Inputs (Pins 6, 13, 14, 15)
VIL
Low Input Voltage
VIH
High Input Voltage
I2C Interface (Pins 11, 12)
IIN = ±10 µA
IIN = ±10 µA
0
0.8
V
2.0
VDD
V
VIL Low Input Voltage
VIH High Input Voltage
IIN Input Current
IOL Low Output Sink Current
Status Flag Outputs (Pin 16, 17)
VIN between 0.1 VDD and 0.9 VDD
VOL = 0V or 0.4V
0
0.3 VDD
V
0.7 VDD
VDD
V
−10
+10
μA
3
mA
VOL Low Output Voltage
VOH High Output Voltage
IOUT = +10 mA
IOUT = −10 mA
VDD
−0.4V
0.4
V
V
Top of Frame Output (Pin 25)
VOL Low Output Voltage
VOH High Output Voltage
IOUT = +10 mA
IOUT = −10 mA
VDD
−0.4V
0.4
V
V
IOZ Output Hi-Z Leakage Current TOF = Hi-Z, VOUT = VDD or GND
tR Rise Time
15 pF Load
tF Fall Time
15 pF Load
tOD Maximum delay time from 50% Output Alignment Mode Disabled
TOF_CLK active edge to 50% (EN_TOF_RST = 0)
TOF leading edge
0.4
10
|μA|
1.5
ns
1.5
ns
1
pixel
period
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