DS90UR241 Datasheet, PDF (5/24 Pages) National Semiconductor (TI) – 5-43 MHz DC-Balanced 24-Bit LVDS Serializer and Deserializer

Deserializer Switching Characteristics (Continued)
Over recommended operating supply and temperature ranges unless otherwise specified.
Symbol
Parameter
Conditions
Pin/Freq.
Min
Typ
t_ROS
t_ROH
t_ROS
t_ROH
t_ROS
t_ROH
t_ROS
t_ROH
t_ROS
t_ROH
t_ROS
t_ROH
t_HZR
t_LZR
t_ZHR
t_ZLR
t_DD
R_OUT (0:7) Setup Data to
RCLK (Group 1)
R_OUT (0:7) Hold Data to
RCLK (Group 1)
R_OUT (8:15) Setup Data to
RCLK (Group 2)
R_OUT (8:15) Hold Data to
RCLK (Group 2)
R_OUT (16:23) Setup Data
to RCLK (Group 3)
R_OUT (16:23) Setup Data
to RCLK (Group 3)
R_OUT (0:7) Setup Data to
RCLK (Group 1)
R_OUT (0:7) Hold Data to
RCLK (Group 1)
R_OUT (8:15) Setup Data to
RCLK (Group 2)
R_OUT (8:15) Hold Data to
RCLK (Group 2)
R_OUT (16:23) Setup Data
to RCLK (Group 3)
R_OUT (16:23) Setup Data
to RCLK (Group 3)
HIGH to TRI-STATE Delay
LOW to TRI-STATE Delay
TRI-STATE to HIGH Delay
TRI-STATE to LOW Delay
Deserializer Delay
PTOSEL = L,
(Figure 12)
PTOSEL = H,
(Figure 11)
PTOSEL = H,
(Figure 13)
PTOSEL = H,
(Figure 10)
R_OUT[0:7]
R_OUT [8:15],
LOCK
R_OUT [16:23]
R_OUT[0:7]
R_OUT [8:15],
LOCK
R_OUT [16:23]
R_OUT [0:23],
RCLK, LOCK
RCLK
(0.35)*
t_RCP
(0.35)*
t_RCP
(0.35)*
t_RCP
(0.35)*
t_RCP
(0.35)*
t_RCP
(0.35)*
t_RCP
(0.35)*
t_RCP
(0.35)*
t_RCP
(0.35)*
t_RCP
(0.35)*
t_RCP
(0.35)*
t_RCP
(0.35)*
t_RCP
(0.5*t_RCP)–3 UI
(0.5*t_RCP)–3 UI
(0.5*t_RCP)–3 UI
(0.5*t_RCP)–3 UI
(0.5*t_RCP)–3 UI
(0.5*t_RCP)–3 UI
(0.5*t_RCP)–2 UI
(0.5*t_RCP)+2 UI
(0.5*t_RCP)−1 UI
(0.5*t_RCP)+1 UI
(0.5*t_RCP)+1 UI
(0.5*t_RCP)–1 UI
3
3
3
3
[5+(5/56)]T+3.7
t_DSR
Deserializer PLL Lock Time (Notes 5, 7)
5 MHz
from Powerdown
43 MHz
RxIN_TOL-L Receiver INput TOLerance (Notes 6, 9),
Left
(Figure 16)
5 MHz–43 MHz
0.25
RxIN_TOL-R Receiver INput TOLerance (Notes 6, 9),
Right
(Figure 16)
5 MHz–43 MHz
0.25
Max Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
10
ns
10
ns
10
ns
10
ns
[5+(5/56)]T ns
+8
128k*T ms
128k*T ms
UI
UI
Note 1: “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. They are not meant to imply that the devices
should be operated at these limits. The table of “Electrical Characteristics” specifies conditions of device operation.
Note 2: Typical values are given for V_DD = 3.3V and T_A = +25˚C.
Note 3: Current into device pins is defined as positive. Current out of a device pin is defined as negative. Voltages are referenced to ground except VOD, ∆VOD,
VTH and VTL which are differential voltages.
Note 4: When the Serializer output is tri-stated, the Deserializer will lose PLL lock. Resynchronization MUST occur before data transfer.
Note 5: t_DSR is the time required by the Deserializer to obtain lock when exiting powerdown mode.
Note 6: RxIN_TOL is a measure of how much phase noise (jitter) the Deserializer can tolerate in the incoming data stream before bit errors occur. It is a
measurement in reference with the ideal bit position, please see National’s AN-1217 for detail.
Note 7: Guaranteed by Design (GBD) using statistical analysis.
Note 8: t_JIT (@BER of 10e-9) specifies the allowable jitter on TCLK. t_JIT not included in TxOUT_E_O parameter.
Note 9: UI – Unit Interval, equivalent to one ideal serialized data bit width. The UI scales with frequency.
Note 10: Figures 1, 2, 9, 10, 14 show a falling edge data strobe (TCLK IN/RCLK OUT).
Note 11: Figures 6, 11, 12 show a rising edge data strobe (TCLK IN/RCLK OUT).
Note 12: TxOUT_E_O is affected by pre-emphasis value.
5
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