DS90UR241 Datasheet, PDF (21/24 Pages) National Semiconductor (TI) – 5-43 MHz DC-Balanced 24-Bit LVDS Serializer and Deserializer

Applications Information (Continued)
LVDS INTERCONNECT GUIDELINES
See AN-1108 and AN-905 for full details.
• Use 100Ω coupled differential pairs
• Use the S/2S/3S rule in spacings
— S = space between the pair
— 2S = space between pairs
— 3S = space to LVCMOS/LVTTL signal
• Minimize the number of VIA
• Use differential connectors when operating above
500Mbps line speed
• Maintain balance of the traces
• Minimize skew within the pair
• Terminate as close to the TX outputs and RX inputs as
possible
Additional general guidance can be found in the LVDS Own-
er’s Manual - available in PDF format from the National web
site at: www.national.com/lvds
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