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SC2200 Datasheet, PDF (44/433 Pages) National Semiconductor (TI) – Thin Client On a Chip
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Signal Definitions (Continued)
Table 2-4. 481-TEPBGA Ball Assignment - Sorted by Ball Number (Continued)
Ball
No. Signal Name
AA1 IDE_RST#
TFTDCK
AA2 IDE_DATA7
INTD#
AA3 IDE_DATA6
IRQ9
AA4 IDE_DATA5
CLK27M
AA28 SDCLK2
AA296 MD61
AA306 MD62
AA316 MD63
AB1 IDE_DATA4
FP_VDD_ON
AB2 VSS
AB3 VIO
AB4 IDE_DATA3
TFTD12
AB286 MD24
AB29
AB30
AB31
AC1
VIO
VSS
DQM7
IDE_DATA1
TFTD16
AC2 IDE_DATA2
TFTD14
AC3 IDE_DATA0
TFTD6
AC4 IDE_DREQ0
TFTD8
AC286 MD25
AC296 MD26
AC306 MD27
AC31
AD1
DQM3
IDE_IORDY0
TFTD11
I/O Buffer1 Power
(PU/PD) Type Rail Configuration
O
O
I/O
I
I/O
I
I/O
O
O
I/O
I/O
I/O
I/O
O
GND
O1/4
O1/4
INTS1,
TS1/4
INTS
INTS1,
TS1/4
INTS1
INTS1,
TS1/4
O1/4
O2/5
INT,
TS2/5
INT,
TS2/5
INT,
TS2/5
INTS1,
TS1/4
O1/4
---
VIO PMR[24] = 0
PMR[24] = 1
VIO PMR[24] = 0
PMR[24] = 1
VIO PMR[24] = 0
PMR[24] = 1
VIO PMR[24] = 0
PMR[24] = 1
VIO ---
VIO ---
VIO ---
VIO ---
VIO PMR[24] = 0
PMR[24] = 1
--- ---
PWR ---
--- ---
I/O
O
I/O
PWR
INTS1,
TS1/4
O1/4
INT,
TS2/5
---
VIO PMR[24] = 0
PMR[24] = 1
VIO ---
--- ---
GND ---
--- ---
O
O2/5
VIO ---
I/O INTS1, VIO PMR[24] = 0
TS1/4
O
O1/4
PMR[24] = 1
I/O INTS1, VIO PMR[24] = 0
TS1/4
O
O1/4
PMR[24] = 1
I/O INTS1, VIO PMR[24] = 0
TS1/4
O
O1/4
PMR[24] = 1
I
INTS1 VIO PMR[24] = 0
O
O1/4
PMR[24] = 1
I/O
INT,
VIO ---
TS2/5
I/O
INT,
VIO ---
TS2/5
I/O
INT,
VIO ---
TS2/5
O
O2/5
VIO ---
I
INTS1 VIO PMR[24] = 0
O
O1/4
PMR[24] = 1
Ball
I/O Buffer1 Power
No. Signal Name (PU/PD) Type Rail Configuration
AD2
AD3
AD4
AD286
AD296
AD306
AD316
AE1
AE2
AE3
AE4
AE28
AE29
AE30
AE316
AF1
AF2
AF3
AF4
AF286
AF296
AF306
AF316
AG1
AG2
AG3
IDE_IOW0#
TFTD9
IDE_ADDR0
TFTD3
IDE_DACK0#
TFTD0
MD52
MD29
MD30
MD31
IDE_ADDR1
TFTD2
VSS
VIO
VSS
VSS
VIO
VSS
MD28
IRQ14
TFTD1
IDE_CS0#
TFTD5
SOUT1
CLKSEL1
OVER_CUR#
MD50
MD49
MD54
MD53
GPIO18
DTR1#/BOUT1
SIN1
X27I
O
O
O
O
O
O
I/O
I/O
I/O
I/O
O
O
GND
O1/4
O1/4
O1/4
O1/4
O1/4
O1/4
INT,
TS2/5
INT,
TS2/5
INT,
TS2/5
INT,
TS2/5
O1/4
O1/4
---
PWR ---
GND ---
GND ---
PWR ---
GND ---
I/O
INT,
TS2/5
I
INTS1
O
O1/4
O
O1/4
O
O1/4
O
O8/8
I
INSTRP
(PD100)
I
INTS
I/O
INT,
TS2/5
I/O
INT,
TS2/5
I/O
INT,
TS2/5
I/O
INT,
TS2/5
I/O
INTS,
(PU22.5) O8/8
O
O8/8
(PU22.5)
I
INTS
I
WIRE
AG4 PLL6B
TEST1
AG286 MD21
I/O
INTS,
TS2/5
O
O2/5
I/O
INT,
TS2/5
VIO PMR[24] = 0
PMR[24] = 1
VIO PMR[24] = 0
PMR[24] = 1
VIO PMR[24] = 0
PMR[24] = 1
VIO ---
VIO ---
VIO ---
VIO ---
VIO PMR[24] = 0
PMR[24] = 1
--- ---
--- ---
--- ---
--- ---
--- ---
--- ---
VIO ---
VIO PMR[24] = 0
PMR[24] = 1
VIO PMR[24] = 0
PMR[24] = 1
VIO ---
Strap (See Table 2-
6 on page 51.)
VIO ---
VIO ---
VIO ---
VIO ---
VIO ---
VIO PMR[16] = 0
PMR[16] =1
VIO ---
VIO ---
VIO PMR[29] = 0
PMR[29] = 1
VIO ---
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