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SC2200 Datasheet, PDF (168/433 Pages) National Semiconductor (TI) – Thin Client On a Chip
Core Logic Module (Continued)
SL1 Sleep State (ACPI S1)
In this state the core processor is in 3V Suspend mode (all
its clocks are stopped, including the memory controller and
the display controller). The SDRAM is placed in self-refresh
mode. All other SC2200 system clocks and PLLs are run-
ning. All devices are powered up (PWRCNT[2:1] and
ONCTL# are all asserted). See Section 5.2.9.5 "Usage
Hints" on page 170.
No reset is performed, when exiting this state. The SC2200
keeps all context in this state. This state corresponds to
ACPI Sleep state S1.
SL2 Sleep State (ACPI S1)
In this state, all of the SC2200 clocks are stopped including
the PLLs. Selected clocks from the PLLs can be kept run-
ning under program control (F0 Index 60h). An exception to
this is the CLK32 output signal which keeps toggling and
the 32 KHz oscillator itself. The SDRAM is placed in self-
refresh mode. The PWRCNT1 pin is deasserted. The
SC2200 itself is powered up. The system designer can
decide which other system devices to power off with the
PWRCNT1 pin.
No reset is performed, when exiting this state. The SC2200
keeps all context in this state. This state corresponds to
ACPI sleep state S1, with lower power and longer wake
time than in SL1.
SL3 Sleep State (ACPI S3)
In this state, the SDRAM is placed in self-refresh mode,
and PWRCNT[2:1] are deasserted. PWRCNT[2:1] should
be used to power off most of the system (except for the
SDRAM). If the Save-to-RAM feature is used, external cir-
cuitry in the SDRAM interface is required to guarantee data
integrity. All SC2200 signals powered by VSB, VSBL or VBAT
are still functional to allow wakeup and to keep the RTC.
The power-up sequence is performed, when exiting this
state. This state corresponds to ACPI Sleep state S3.
SL4 and SL5 Sleep States (ACPI S4 and S5)
The SL4 and SL5 states are similar from the hardware per-
spective. In these states, the SC2200 deasserts
PWRCNT[2:1] and ONCTL#. PWRCNT[2:1] and ONCTL#
should be used to power off the system. All signals pow-
ered by VSB, VSBL or VBAT are still functional to allow
wakeup and to keep the RTC.
While in this state, LED# can be toggled to give visual noti-
fication of this state. ACPI Function Control register
(F1BAR1+I/O Offset 07h[7:6]) is used to control LED#.
The power-up sequence is performed when exiting this
state. This state corresponds to ACPI Sleep states S4 and
S5.
Event
Enabled Interrupts
SMI according to Table 5-8
SCI according to Table 5-8
GPIO[47:32], GPIO[15:0]
Power Button
Power Button Override
Bus Master Request
Thermal Monitoring
USB
SDATA_IN2 (AC97)
IRRX1 (Infrared)
GPWIO[2:0]
RI2# (UART2)
RTC
1. Temporarily exits state.
Table 5-5. Wakeup Events Capability
S0/C1
S0/C3
SL1
SL2
Yes
Yes
Yes
-
Yes
Yes
Yes
-
Yes
Yes
Yes
-
Yes
Yes
Yes
-
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes1
Yes
Yes
-
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
SL3
SL4, SL5
-
-
-
-
-
-
-
-
Yes
Yes
Yes
Yes
-
-
Yes
Yes
-
-
-
-
-
-
Yes
Yes
-
-
Yes
Yes
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