SC2200 Datasheet, PDF (138/433 Pages) National Semiconductor (TI) – Thin Client On a Chip

SuperI/O Module (Continued)
4.8 LEGACY FUNCTIONAL BLOCKS
This section briefly describes the following blocks that pro-
vide legacy device functions:
• Parallel Port.
• Serial Port 1 and Serial Port 2 (SP1 and SP2), UART
functionality for both SP1 and SP2.
• Infrared Communications Port / Serial Port 3 function-
ality.
Notes
• SP1 and SP2 are similar to SCC1 in the National
PC87338 device.
• The Parallel Port is similar to Parallel Port in the National
PC87338 device.
• The IR Communications Port is similar to SCC2 in the
National PC87338 device.
The description of each Legacy block includes a general
description, register maps, and bit maps. For more informa-
tion about legacy blocks, contact your National Semicon-
ductor representative.
4.8.1 Parallel Port
The Parallel Port supports all IEEE1284 standard commu-
nication modes: Compatibility (known also as Standard or
SPP), Bidirectional (known also as PS/2), FIFO, EPP
(known also as Mode 4) and ECP (with an optional
Extended ECP mode).
4.8.1.1 Parallel Port Register and Bit Maps
The Parallel Port register maps (Table 4-33 and Table 4-34)
are grouped according to first and second level offsets.
EPP and second level offset registers are available only
when the base address is 8-byte aligned.
Parallel Port functional block bit maps are shown in Table 4-
35 and Table 4-36.
Table 4-33. Parallel Port Register Map for First Level Offset
First Level Offset
Type
Name
Modes (ECR Bits) 7 6 5
000h
000h
001h
002h
003h
004h
005h
006h
007h
400h
400h
400h
400h
401h
402h
403h
404h
405h
R/W
DATAR. PP Data
W
AFIFO. ECP Address FIFO
RO
DSR. Status
R/W
DCR. Control
R/W
ADDR. EPP Address
R/W
DATA0. EPP Data Port 0
R/W
DATA1. EPP Data Port 1
R/W
DATA2. EPP Data Port 2
R/W
DATA3. EPP Data Port 3
W
CFIFO. PP Data FIFO
R/W
DFIFO. ECP Data FIFO
R/W
TFIFO. Test FIFO
RO
CNFGA. Configuration A
RO
CNFGB. Configuration B
R/W
ECR. Extended Control
R/W
EIR. Extended Index
R/W
EDR. Extended Data
R/W
EAR. Extended Auxiliary Status
000 or 001
011
All Modes
All Modes
100
100
100
100
100
010
011
110
111
111
All Modes
All Modes
All Modes
All Modes
Table 4-34. Parallel Port Register Map for Second Level Offset
Second Level Offset
Type
Name
00h
R/W
Control0. Control Register 0
02h
R/W
Control2. Control Register 2
04h
R/W
Control4. Control Register 4
05h
R/W
PP Confg0. Parallel Port Configuration Register 0
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