SC2200 Datasheet, PDF (145/433 Pages) National Semiconductor (TI) – Thin Client On a Chip

SuperI/O Module (Continued)
Table 4-47. Bank Selection Encoding
BSR Bits
7
6
5
4
3
2
1
0
Bank Selected
0
x
x
x
x
x
x
x
0
1
0
x
x
x
x
x
x
1
1
1
x
x
x
x
1
x
1
1
1
x
x
x
x
x
1
1
1
1
1
0
0
0
0
0
2
1
1
1
0
0
1
0
0
3
1
1
1
0
1
0
0
0
4
1
1
1
0
1
1
0
0
5
1
1
1
1
0
0
0
0
6
1
1
1
1
0
1
0
0
7
Functionality
UART + IR
IR Only
Table 4-48. Bank 1 Register Map
Offset
Type
Name
00h
01h
02h
03h
04h-07h
R/W
LBGD(L). Legacy Baud Generator Divisor Port (Low Byte)
R/W
LBGD(H). Legacy Baud Generator Divisor Port (High Byte)
---
RSVD. Reserved
W
LCR¹. Link Control
R/W
BSR¹. Bank Select
---
RSVD. Reserved
1. When bit 7 of this register is set to 1, bits [6:0] of BSR select the bank, as shown in Table 4-47.
Offset
00h
01h
02h
03h
04h
05h
06h
07h
Type
R/W
R/W
R/W
R/W
R/W
---
RO
RO
Table 4-49. Bank 2 Register Map
Name
BGD(L). Baud Generator Divisor Port (Low Byte)
BGD(H). Baud Generator Divisor Port (High Byte)
EXCR1. Extended Control 1
BSR. Bank Select
EXCR2. Extended Control 2
RSVD. Reserved
TXFLV. TX FIFO Level
RXFLV. RX FIFO Level
Revision 3.0
145
www.national.com