DS90C2501 Datasheet, PDF (21/48 Pages) National Semiconductor (TI) – Transmitter with built-in scaler for LVDS Display Interface (LDI)

Host Control Register Descriptions (Continued)
Register Name: DEBUG_A
Address Offset: 0Dh
Default Value: See Description — Depends on pin state
Access Method: Mixed
Bit
Description
1:0
DUAL (1:0), State of DUAL pin (Read Only)
00= SISO
01= SIDO
11= DIDO
2
PLLOCK (Read Only)
3
Reserved (Read Only)
7:4
Reserved (R/W)
Register Name: RESERVED
Address Offset: 0Eh–0Fh
Default Value: 00h
Access Method: R/W
Bit
Description
7:0
Reserved
LVDS Interface
X
X=R
X=G
X=B
TABLE 2. LVDS data bit naming convention
Y
Z
Y=1
Y=2
Z=0-7
Description
Red
Green
Blue
Odd (First) Pixel
Even (Second) Pixel
LVDS bit number (not VGA controller LSB to MSB)
21
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