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DS90C2501 Datasheet, PDF (11/48 Pages) National Semiconductor (TI) – Transmitter with built-in scaler for LVDS Display Interface (LDI) | |||
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AC Timing Diagrams (Continued)
C â Setup and Hold Time (Internal data sampling window) defined by Rspos (receiver input strobe position) min and max
Tppos â Transmitter output pulse position (min and max)
RSKM = Cable Skew (type, length) + Source Clock Jitter (cycle to cycle) + ISI (Inter-symbol interference) (Note 10)
Cable Skew â typically 10 psâ40 ps per foot, media dependent
Note 10: ISI is dependent on interconnect length; may be zero
FIGURE 10. Receiver Skew Margin
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FIGURE 11. Resistor Network for âDUALâ pin input - recommend using R1=R2=10k⦠±1% for single to dual mode
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