DS90C2501 Datasheet, PDF (16/48 Pages) National Semiconductor (TI) – Transmitter with built-in scaler for LVDS Display Interface (LDI)

DS90C2501 Pin Description (Continued)
TABLE 1. scaler is powered down under these conditions
/PD pin
DUAL pin
provided that PD
bit is 1 and
BYPASS bit is 0
No input clock is
detected
PD bit issued by
host
BYPASS bit
issued by host.
scaler is On
H
L or ¹â„2V_CC
scaler is OFF
L
L or ¹â„2V_CC or VCC
NO
YES
1
0
0
1
Two-Wire Serial Communication
Interface Description
There are two register sets on DS90C2501. One set is for
controlling the input and output blocks as shown below, and
one set is for controlling the scaler which is not shown on this
datasheet. Both register sets are accessible by the host
system through the Two-Wire Serial Communication Inter-
face. The DS90C2501 operates as a slave on the Serial Bus,
so the SCL line is an input (no clock is generated by the
DS90C2501) and the SDA line is bi-directional. DS90C2501
has a 7-bit slave address. The address bits are controlled by
the state of the address select pins A2, A1 and A0, and are
set by connecting these pins to ground for a LOW, (0) , to
V_CC3V pin for a HIGH, (1).
Therefore, the complete slave address is:
A6 A5 A4 A3 A2 A1 A0
MSB
LSB
and is selected as follows:
Address Select Pin
State
A2
A1
A0
0
0
0
0
0
1
0
1
0
0
1
1
1
0
0
1
0
1
1
1
0
1
1
1
DS90C2501 Serial
Bus Slave Address
(A6:A3 are hardwired
to "0111")
A6:A0 binary
0111000
0111001
0111010
0111011
0111100
0111101
0111110
0111111
The DS90C2501 latches the state of the address select pins
during the first read or write on the Serial Bus. Changing the
state of the address select pins after the first read or write to
any device on the Serial Bus will not change the slave
address of the DS90C2501.
Communicating with the DS90C2501 Control Registers
All registers are predefined as read only, or read and write.
The Serial Interface will always attempt to detect if a LCD
panel/monitor is connected.
A Write to the DS90C2501 will always include the slave
address byte, data register address byte, a data byte.
A Read from the DS90C2501 can take place either of two
ways:
1. If the location latched in the data register addresses is
correct , then the read can simply consist of a slave
address byte, followed by retrieving the data byte.
2. If the data register address needs to be set, then a slave
address byte, data register address will be sent first,
then the master will repeat start, send the slave address
byte and receive data byte to accomplish a read.
The data byte has the most significant bit first. At the end of
a read, the DS90C2501 can accept either Acknowledge or
No Acknowledge from the Master (No Acknowledge is typi-
cally used as a signal for the slave that the Master has read
its last byte).
Serial Bus Protocol
The DS90C2501 slave state machine does not require an
internal clock, and supports only byte read and write. Page
mode is not supported. The 7-bit binary address is
“0111A₂A₁A₀”, where A₂A₁A₀ are pin programmable and
A6:A3 are hardwired internally to "0111"
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