English
Language : 

COP87L84BC Datasheet, PDF (18/54 Pages) National Semiconductor (TI) – 8-Bit CMOS OTP Microcontrollers with 16k Memory, Comparators, and CAN Interface
Power Save Modes (Continued)
T0, are stopped. The power supply requirements of the mi-
crocontroller in this mode of operation are typically around
30% of normal power requirement of the microcontroller.
As with the HALT mode, the device can be returned to nor-
mal operation with a reset, or with a Multi-Input Wake Up
from the L Port or CAN Interface. Alternately, the microcon-
troller resumes normal operation from the IDLE mode when
the thirteenth bit (representing 4.096 ms at internal clock fre-
quency of 1 MHz, tc = 1 µs) of the IDLE Timer toggles.
This toggle condition of the thirteenth bit of the IDLE Timer
T0 is latched into the T0PND pending flag.
The user has the option of being interrupted with a transition
on the thirteenth bit of the IDLE Timer T0. The interrupt can
be enabled or disabled via the T0EN control bit. Setting the
T0EN flag enables the interrupt and vice versa.
The user can enter the IDLE mode with the Timer T0 inter-
rupt enabled. In this case, when the T0PND bit gets set, the
device will first execute the Timer T0 interrupt service routine
and then return to the instruction following the “Enter Idle
Mode” instruction.
Alternatively, the user can enter the IDLE mode with the
IDLE Timer T0 interrupt disabled. In this case, the device will
resume normal operation with the instruction immediately
following the “Enter IDLE Mode” instruction.
Note: It is necessary to program two NOP instructions following both the set
HALT mode and set IDLE mode instructions. These NOP instructions
are necessary to allow clock resynchronization following the HALT or
IDLE modes.
Multi-Input Wake Up
The Multi-Input Wake Up feature is used to return (wake up)
the device from either the HALT or IDLE modes. Alternately,
the Multi-Input Wake Up/Interrupt feature may also be used
to generate up to 7 edge selectable external interrupts.
Figure 18 shows the Multi-Input Wake Up logic for the micro-
controller. The Multi-Input Wake Up feature utilizes the L
Port. The user selects which particular L port bit (or combina-
tion of L Port bits) will cause the device to exit the HALT or
IDLE modes. The selection is done through the Reg: WKEN.
The Reg: WKEN is an 8-bit read/write register, which con-
tains a control bit for every L port bit. Setting a particular
WKEN bit enables a Wake Up from the associated port pin.
The user can select whether the trigger condition on the se-
lected L Port pin is going to be either a positive edge (low to
high transition) or a negative edge (high to low transition).
This selection is made via the Reg: WKEDG, which is an
8-bit control register with a bit assigned to each L Port pin.
Setting the control bit will select the trigger condition to be a
negative edge on that particular L Port pin. Resetting the bit
selects the trigger condition to be a positive edge. Changing
an edge select entails several steps in order to avoid a
pseudo Wake Up condition as a result of the edge change.
First, the associated WKEN bit should be reset, followed by
the edge select change in WKEDG. Next, the associated
WKPND bit should be cleared, followed by the associated
WKEN bit being re-enabled.
An example may serve to clarify this procedure. Suppose we
wish to change the edge select from positive (low going high)
to negative (high going low) for L Port bit 5, where bit 5 has
previously been enabled for an input interrupt. The program
would be as follows:
RBIT
SBIT
RBIT
SBIT
5, WKEN
5, WKEDG
5, WKPND
5, WKEN
; Disable MIWU
; Change edge polarity
; Reset pending flag
; Enable MIWU
If the L port bits have been used as outputs and then
changed to inputs with Multi-Input Wake Up/Interrupt, a
safety procedure should also be followed to avoid inherited
pseudo wake up conditions. After the selected L port bits
have been changed from output to input but before the asso-
ciated WKEN bits are enabled, the associated edge select
bits in WKEDG should be set or reset for the desired edge
selects, followed by the associated WKPND bits being
cleared.
This same procedure should be used following reset, since
the L port inputs are left floating as a result of reset. The oc-
currence of the selected trigger condition for Multi-Input
Wake Up is latched into a pending register called WKPND.
The respective bits of the WKPND register will be set on the
occurrence of the selected trigger edge on the correspond-
ing Port L pin. The user has the responsibility of clearing
these pending flags. Since WKPND is a pending register for
the occurrence of selected wake up conditions, the device
will not enter the HALT mode if any Wake Up bit is both en-
abled and pending. Consequently, the user has the respon-
sibility of clearing the pending flags before attempting to en-
ter the HALT mode.
The WKEN, WKPND and WKEDG are all read/write regis-
ters, and are cleared at reset.
www.national.com
18