COP87L84BC Datasheet, PDF (1/54 Pages) National Semiconductor (TI) – 8-Bit CMOS OTP Microcontrollers with 16k Memory, Comparators, and CAN Interface

September 1999
COP87L84BC
8-Bit CMOS OTP Microcontrollers with 16k Memory,
Comparators, and CAN Interface
General Description
The COP87L84BC OTP (One Time Programmable) micro-
controllers are highly integrated COP8™ Feature core de-
vices with 16k OTP EPROM memory and advanced features
including a CAN 2.0B (passive) interface and two Analog
comparators. These multi-chip CMOS devices are suited for
applications requiring a full featured controller with a CAN in-
terface, and 8-bit 39 kHz PWM timer, and as pre-production
devices for a masked ROM design. Pin and software com-
patible 2k ROM versions are available (COP884BC) with a
range of COP8 software and hardware development tools.
Features include an 8-bit memory mapped architecture, 10
MHz CKI (-XE = crystal oscillator) with 1µs instruction cycle,
one multi-function 16-bit timer/counter, 8-bit 39 kHz PWM
timer with 2 outputs, CAN 2.0B (passive) interface,
MICROWIRE/PLUS™ serial I/O, two Analog comparators,
two power saving HALT/IDLE modes, idle timer, MIWU, soft-
ware selectable I/O options, low EMI 4.5V to 5.5V operation,
and 28 pin packages.
Note: The companion devices with CAN interface, more I/O
and memory, A/D, and USART are the COP87L88EB/RB.
Device included in this datasheet is:
Device
COP87L84BC
Memory (bytes)
16k OTP EPROM
RAM (bytes)
64
I/O Pins
18
Packages
28 SOIC
Temperature
-40 to +85˚C
Key Features
n CAN 2.0B (passive) Interface
n One 16-bit timer, with two 16-bit registers supporting:
— Processor Independent PWM mode
— External Event counter mode
— Input Capture mode
n High speed, constant resolution 8-bit PWM/frequency
monitor timer with 2 output pins
n 16 kbytes on-board OTP EPROM with security feature
n 64 bytes on-board RAM
Additional Peripheral Features
n Idle Timer
n Multi-Input Wake Up (MIWU) with optional interrupts (7)
n Two analog comparators
n MICROWIRE/PLUS serial I/O
I/O Features
n Memory mapped I/O
n Software selectable I/O options (TRI-STATE^® Output,
Push-Pull Output, Weak Pull-Up Input, High Impedance
Input)
n Schmitt trigger inputs on ports G and L
n Packages: 28 SO with 18 I/O pins
CPU/Instruction Set Features
n 1 µs instruction cycle time
n Eleven multi-source vectored interrupts servicing
— External Interrupt
— Idle Timer T0
— Timer T1 (with 2 Interrupts)
— MICROWIRE/PLUS
— Multi-Input Wake Up
— Software Trap
— PWM Timer
— CAN Interface (with 3 interrupts)
n Versatile and easy to use instruction set
n 8-bit Stack Pointer (SP) — stack in RAM
n Two 8-bit Register Indirect Data Memory Pointers
(B and X)
Fully Static CMOS
n Two power saving modes: HALT and IDLE
n Single supply operation: 4.5V–5.5V
n Temperature ranges: −40˚C to +85˚C
Development Support
n Emulation device for COP884BC/COP885BC
n Real time emulation and full program debug offered by
MetaLink Development Systems
COP8™, and MICROWIRE/PLUS™ are trademarks of National Semiconductor Corporation.
TRI-STATE^® is a registered trademark of National Semiconductor Corporation.
iceMASTER^® is a registered trademark of MetaLink Corporation.
© 1999 National Semiconductor Corporation DS101137
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