UPD784915B Datasheet, PDF (67/86 Pages) NEC – 16-BIT SINGLE-CHIP MICROCONTROLLERS

µPD784915B, 784916B
DC Characteristics (TA = –10 to +70°C, VDD = AVDD = 4.5 to 5.5 V, VSS = AVSS = 0 V)
Parameter
Low-level input voltage
High-level input voltage
Low-level output voltage
High-level output voltage
Input leakage current
Output leakage current
VDD supply current
Data hold voltage
Data hold current^{Note 3}
Pull-up resistor
Symbol
Conditions
MIN.
VIL1 Pins other than those listed in Note 1 below
0
VIL2 Pins listed in Note 1 below
0
VIL3 X1, X2
0
VIH1 Pins other than those listed in Note 1 below 0.7 VDD
VIH2 Pins listed in Note 1 below
0.8 VDD
VIH3 X1, X2
VDD – 0.5
VOL1 IOL = 5.0 mA (pins in Note 2)
VOL2 IOL = 2.0 mA
VOL3 IOL = 100 µA
VOH1 IOH = –1.0 mA
VDD – 1.0
VOH2 IOH = –100 µA
VDD – 0.4
ILI
0 ≤ VI ≤ VDD
ILO 0 ≤ VO ≤ VDD
IDD1 Operation fXX = 16 MHz
mode
fXX = 8 MHz (low-frequency os-
cillation mode)
Internally, 8-MHz main system
clock operation
fXT = 32.768 kHz
Subclock operation (CPU,
watch, port)
VDD = 2.7 V
IDD2 HALT mode fXX = 16 MHz
fXX = 8 MHz (low-frequency
oscillation mode)
Internally, 8-MHz main clock
operation
fXT = 32.768 MHz
Subclock operation (CPU,
watch, port)
VDD = 2.7 V
VDDDR STOP mode
2.5
IDDDR STOP mode Subclock oscillates
VDDDR = 5.0 V
STOP mode Subclock oscillates
VDDDR = 2.7 V
STOP mode Subclock stops
VDDDR = 2.5 V
RL VI = 0 V
25
TYP.
30
50
10
25
18
2.5
0.2
55
MAX. Unit
0.3 VDD
V
0.2 VDD
V
0.4
V
VDD
V
VDD
V
VDD
V
0.6
V
0.45
V
0.25
V
V
V
±10
µA
±10
µA
50
mA
80
µA
25
mA
50
µA
V
50
µA
10
µA
7.0
µA
110
kΩ
Notes 1. RESET, IC, NMI, INTP0-INTP2, P61/SCK1/BUZ, P63/SI1, SCK2, SI2/BUSY, P65/HWIN, P91/KEY0-
P95/KEY4
2. P46, P47
3. In the STOP mode in which the subclock oscillation is stopped, disconnect the feedback resistor, and
connect the XT1 pin to VDD.
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