UPD784915B Datasheet, PDF (26/86 Pages) NEC – 16-BIT SINGLE-CHIP MICROCONTROLLERS

µPD784915B, 784916B
Table 3-2. Special Function Registers (3/4)
Address Special Function Register (SFR) Name
FF76H PWM5 modulo register
FF77H PWM4 modulo register
FF78H Event divider control register
FF79H Clock output mode register
FF7AH Timer 4 capture/compare register 0
FF7BH Clock control register
FF7CH Timer 4 capture register 1
FF7DH Capture/compare control register
FF7EH Timer 5 compare register
FF84H Serial mode register 1
FF85H Serial shift register 1
FF88H Serial mode register 2
FF89H Serial shift register 2
FF8AH Serial control register 2
FF91H Head amplifier switch output control register
FF94H Amplifier control register
FF95H Amplifier mode register 0
FF96H Amplifier mode register 1
FF97H Gain control register
FFA0H External interrupt mode register
FFA1H External capture mode register 1
FFA2H External capture mode register 2
FFA6H Key interrupt control register
FFA8H In-service priority register
FFAAH Interrupt mode control register
FFACH Interrupt mask flag register
FFADH
FFAEH
FFAFH
FFB0H FRC capture register 0L
FFB1H FRC capture register 0H
FFB2H FRC capture register 1L
FFB3H FRC capture register 1H
FFB4H FRC capture register 2L
FFB5H FRC capture register 2H
FFB6H FRC capture register 3L
FFB7H FRC capture register 3H
FFB8H FRC capture register 4L
Symbol
Bit
R/W Length
PWM5 R/W 16
PWM4
8
EDVC
W
8
CLOM R/W 8
CR40
16
CC
8
CR41
R
16
CRC
W
8
CR50 R/W 16
CSIM1
8
SIO1
8
CSIM2
8
SIO2
8
CSIC2
8
HAPC
8
AMPC
8
AMPM0
8
AMPM1
8
CTLM
8
INTM0
8
INTM1
8
INTM2
8
KEYC
8
ISPR
R
8
IMC
R/W 8
MK0L
8
MK0
MK0H
8
MK1L
8
MK1
MK1H
8
CPT0L
R
16
CPT0H
8
CPT1L
16
CPT1H
8
CPT2L
16
CPT2H
8
CPT3L
16
CPT3H
8
CPT4L
16
Bit Units for
After
Manipulation
Releasing
1 bit 8 bits 16 bits Reset
-
-
√
0000H
-
√
-
00H
-
√
-
00H
√
√
-
00H
-
-
√ Cleared to 0
√
√
-
00H
-
-
√ Cleared to 0
-
√
-
00H
-
-
√ Cleared to 0
√
√
-
00H
-
√
-
Undefined
√
√
-
00H
-
√
-
Undefined
-
√
-
00H
√
√
-
√
√
-
√
√
-
√
√
-
√
√
-
√
√
-
000000×0
√
√
-
00H
√
√
-
√
√
-
70H
√
√
-
00H
√
√
-
80H
√
√
√
FFH
√
√
√
√
√
√
√
-
-
√ Cleared to 0
-
√
-
-
-
√
-
√
-
-
-
√
-
√
-
-
-
√
-
√
-
-
-
√
Remark Cleared to 0: Counter is initialized to 0 within 16 clocks after the reset signal has been deasserted (the
contents before initialization are undefined).
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