UPD784915B Datasheet, PDF (59/86 Pages) NEC – 16-BIT SINGLE-CHIP MICROCONTROLLERS

Figure 4-6. Block Diagram of Clock Generator Circuit
X1
X2
16 MHz or 8 MHz
µ PD784916B
Main
system _fXX
clock
oscillation
circuit
Low-frequency
oscillation mode
Normal mode
1/2
Oscillation stop
From standby control block
CC.7
XT1
XT2
32.768 kHz
Subsystem
clock
fXT
oscillator
circuit
Oscillation stop
STBC.7
Watch timer
STBC.4, 5
Oscillation Stabilization Timer
1/2
1/2
fXX/16 (fXX/8)^{Note 1}
1/2
fXX/8 (fXX/4)^{Note 1}
fXX/4 (fXX/2)^{Note 1}
fXX/2 (fXX)^{Note 1}
STBC.6
fCLK
CPU
Peripheral hardware
operation clock^{Note 2}
Hardware watch function
Watch interrupt
Notes 1. Oscillation frequency, values in parentheses indicate the low frequency oscillation mode.
2. The peripheral hardware units that can operate with the subsystem clock have some restrictions. For details, refer to 14.6 Low Power
Dissipation Mode in µPD784915 Subseries User’s Manual.