UPD784915B Datasheet, PDF (25/86 Pages) NEC – 16-BIT SINGLE-CHIP MICROCONTROLLERS

µPD784915B, 784916B
Table 3-2. Special Function Registers (2/4)
Address Special Function Register (SFR) Name
FF3CH Timer register 3
FF3DH Timer control register 4
FF3EH Timer register 4
FF48H Port 8 mode control register
FF4DH Trigger source select register
FF4EH Pull-up resistor option register L
FF4FH Pull-up resistor option register H
FF50H Input control register
FF51H Up/down counter count register
FF52H Event divider counter
FF53H Capture mode register
FF54H Timer register 5
FF56H Timer 3 capture register 0
FF58H Timer 0 output mode register
FF59H Timer 0 output control register
FF5AH Timer 1 output mode register
FF5BH Timer 1 output control register
FF5CH Timer 3 compare register 0
FF5EH Timer 3 compare register 1
FF60H Port 8 buffer register L
FF63H Up/down counter compare register
FF65H Trigger source select register 1
FF66H Port 6 mode control register
FF68H A/D converter mode register
FF6AH A/D conversion result register
FF6CH Hardware watch counter 0
FF6EH Hardware watch counter 1
FF6FH Watch mode register
FF70H PWM control register 0
FF71H PWM control register 1
FF72H PWM0 modulo register
FF73H PWM2 modulo register
FF74H PWM1 modulo register
FF75H PWM3 modulo register
Symbol
Bit
R/W Length
TM3
R
16
TMC4 R/W 8
TM4
R
16
PMC8 R/W 8
TRGS0
8
PUOL
8
PUOH
8
ICR
8
UDC
8
EDV
R
8
CPTM R/W 8
TM5
R
16
CPT30
16
TOM0
W
8
TOC0
8
TOM1^{Note 1} R/W 8
TOC1
W
8
CR30 R/W 16
CR31
16
P8L
8
UDCC
W
8
TRGS1 R/W 8
PMC6
8
ADM
16
ADML^{Note 2}
8
ADCR
R
8
HW0
R/W 16
HW1
R
16
WM
R/W 8
PWMC0 R/W 8
PWMC1
8
PWM0
16
PWM2
8
PWM1
16
PWM3
8
Bit Units for
After
Manipulation
Releasing
1 bit 8 bits 16 bits Reset
-
-
√ Cleared to 0
√
√
-
××000000
-
-
√ Cleared to 0
√
√
-
00H
√
√
-
√
√
-
√
√
-
√
√
-
10H
-
√
-
Undefined
-
√
- Cleared to 0
√
√
-
00H
-
-
√ Cleared to 0
-
-
√
-
√
-
××000000
-
√
-
00H
-
√
-
80H
-
√
-
00H
-
-
√ Cleared to 0
-
-
√
√
√
-
000×0×0×
-
√
-
Undefined
√
√
-
00H
√
√
-
-
-
√
0000H
√
√
-
-
√
-
Undefined
-
-
√ Not affected
-
-
√ by reset
√
√
-
00××0×00
√
√
-
05H
√
√
-
15H
-
-
√
0000H
-
√
-
00H
-
-
√
0000H
-
√
-
00H
Notes 1. When the timer 1 output mode register (TOM1) is read, the write sequence of the REC driver is read
(bits 0 and 1).
2. ADML is the low-order 8 bits of the A/D converter mode register (ADM) and can be manipulated in 1-
or 8-bit units.
Remark Cleared to 0: Counter is initialized to 0 within 16 clocks after the reset signal has been deasserted (the
contents before initialization are undefined).
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