UPD70F3212 Datasheet, PDF (538/861 Pages) NEC – 32-Bit Single-Chip Microcontrollers

CHAPTER 19 I²C BUS
(3/3)
ACKD0
Detection of acknowledge signal (ACK)
0
ACK signal was not detected.
1
ACK signal was detected.
Condition for clearing (ACKD0 bit = 0)
Condition for setting (ACKD0 bit = 1)
• When a stop condition is detected
• At the rising edge of the next byte’s first clock
• Cleared by the LREL0 bit = 1 (exit from communications)
• When the IICE0 bit changes from 1 to 0 (operation stop)
• Reset
• After the SDA0 pin is set to low level at the rising edge of
the SCL0 pin’s ninth clock
STD0
Detection of start condition
0
Start condition was not detected.
1
Start condition was detected. This indicates that the address transfer period is in effect
Condition for clearing (STD0 bit = 0)
Condition for setting (STD0 bit = 1)
• When a stop condition is detected
• At the rising edge of the next byte’s first clock following
address transfer
• Cleared by the LREL0 bit = 1 (exit from communications)
• When the IICE0 bit changes from 1 to 0 (operation stop)
• Reset
When a start condition is detected
SPD0
Detection of stop condition
0
Stop condition was not detected.
1
Stop condition was detected. The master device’s communication is terminated and the bus is released.
Condition for clearing (SPD0 bit = 0)
Condition for setting (SPD0 bit = 1)
• At the rising edge of the address transfer byte’s first
clock following setting of this bit and detection of a start
condition
• When the IICE0 bit changes from 1 to 0 (operation stop)
• Reset
When a stop condition is detected
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User’s Manual U16890EJ1V0UD