UPD70F3114 Datasheet, PDF (342/692 Pages) NEC – 32-Bit Single-Chip Microcontrollers

CHAPTER 9 TIMER/COUNTER FUNCTION
Bit position
11, 3
Bit name
LNKEn
10, 2
CCSEn
9, 8, 1, 0
TB1En,
TB0En
(2/2)
Function
Selects capture event signal input from edge selection and specifies transfer
operation in compare register mode.
0: ED1 signal input selected in capture register mode.
In the compare register mode, the data of the CVSEn0 register is transferred to
the CVPEn0 register upon occurrence of a TM2x compare match (TM2x =
timer/ counter selected with bits TB1En, TB0En).
1: ED2 signal input selected in capture register mode.
In the compare register mode, the data of the CVSEn0 register is transferred to
the CVPEn0 register when the TM2x count value becomes 0 (TM2x = timer/
counter selected by bits TB1En, TB0En).
Selects capture/compare register operation mode.
0: Capture register mode
1: Compare register mode
Sets subchannel n timer/counter.
TB1En TB0En
Subchannel n timer/counter
0
0
Subchannel n not used
0
1
TM20 set to subchannel n.
1
0
TM21 set to subchannel n.
1
1
32-bit mode^Note (both TM20 and TM21 selected)
Note In the 32-bit mode, the effect of the BFEEn bit is ignored. Also, the CVSEn
register cannot be used as a buffer in this mode.
Caution When the TB1En, TB0En bits are set to 11, set the CASE1 bit of the
TCRE0 register to 1.
Remark n = 3, 4
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User’s Manual U15195EJ5V0UD