UPD70F3114 Datasheet, PDF (305/692 Pages) NEC – 32-Bit Single-Chip Microcontrollers

CHAPTER 9 TIMER/COUNTER FUNCTION
(6) Prescaler mode register 10 (PRM10)
The PRM10 register is used to perform the following selections.
• Selection of count clock in general-purpose timer mode (CMD bit of TUM0 register = 0)
• Selection of count operation mode in UDC mode (CMD = 1)
PRM10 can be read/written in 8-bit or 1-bit units.
Cautions 1. Overwriting the PRM10 register during TM10 operation (TM1CE0 bit = 1) is prohibited.
2. Clearing the PRM12 bit to 0 is prohibited in UDC mode (CMD bit of TUM0 register = 1).
3. When TM10 is in mode 4, specification of the valid edge for the TIUD10 and TCUD10
pins is valid.
7
6
5
4
3
2
1
0
Address After reset
PRM10
0
0
0
0
0
PRM12 PRM11 PRM10 FFFFF5EEH
07H
Bit position
2 to 0
Bit name
PRM12 to
PRM10
Function
Specifies the up/down count operation mode during input of the clock rate when the
internal clock of the TM10 is used, or during external clock (TIUD10) input.
PRM12 PRM11 PRM10
0
0
0
0
0
1
0
1
0
0
1
1
1
0
0
1
0
1
1
1
0
1
1
1
Remark fCLK: Base clock
CMD = 0
Count clock
Setting
prohibited
fCLK/2
fCLK/4
fCLK/8
fCLK/16
fCLK/32
fCLK/64
fCLK/128
CMD = 1
Count clock UDC mode
Setting prohibited
TIUD10
Mode 1
Mode 2
Mode 3
Mode 4
(a) In general-purpose timer mode (CMD bit of TUM0 register = 0)
The count clock is specified by bits PRM12 to PRM10.
(b) UDC mode (CMD bit of TUM0 register = 1)
The TM10 count triggers in the UDC mode are as follows.
Operation Mode
Mode 1
Mode 2
Mode 3
Mode 4
TM10 Operation
Down count when TCUD10 = high level
Up count when TCUD10 = low level
Up count upon detection of valid edge of TIUD10 input
Down count upon detection of valid edge of TCUD10 input
Up count upon detection of valid edge of TIUD10 input when TCUD10 = high level
Down count upon detection of valid edge of TIUD10 input when TCUD10 = low level
Automatic judgment upon detection of both edges of TIUD10 input and both edges of TCUD10 input
User’s Manual U15195EJ5V0UD
305