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MC68HC12D60 Datasheet, PDF (58/432 Pages) Motorola, Inc – Advance Information - Rev 4.0
Freescale Semiconductor, Inc.
Pinout and Signal Descriptions
Setting the RDPP bit in the PWCTL register configures all port P outputs
to have reduced drive levels. Levels are at normal drive capability after
reset. The PWCTL register can be read or written anytime after reset.
Refer to Pulse Width Modulator.
3.6.10 Port S
Port S is the 8-bit interface to the standard serial interface consisting of
the two serial communications interfaces (SCI1 and SCI0) and the serial
peripheral interface (SPI) subsystems. Port S pins are available for
general-purpose parallel I/O when standard serial functions are not
enabled.
Port S pins serve several functions depending on the various internal
control registers. If WOMS bit in the SC0CR1register is set, the P-
channel drivers of the output buffers are disabled for bits 0 through 1 for
the SCSI1 (2 through 3 for the SCI0). If SWOM bit in the SP0CR1
register is set, the P-channel drivers of the output buffers are disabled
for bits 4 through 7 (wire-ORed mode). The open drain control effects to
both the serial and the general-purpose outputs. If the RDPSx bits in the
PURDS register are set, the appropriate Port S pin drive capabilities are
reduced. If PUPSx bits in the PURDS register are set, the appropriate
pull-up device is connected to each port S pin which is programmed as
a general-purpose input. If the pin is programmed as a general-purpose
output, the pull-up is disconnected from the pin regardless of the state of
the individual PUPSx bits. See Multiple Serial Interface.
3.6.11 Port T
This port provides eight general-purpose I/O pins when not enabled for
input capture and output compare in the timer and pulse accumulator
subsystem. The TEN bit in the TSCR register enables the timer function.
The pulse accumulator subsystem is enabled with the PAEN bit in the
PACTL register.
Register DDRT determines pin direction of port T when used for general-
purpose I/O. When DDRT bits are set, the corresponding pin is
Advance Information
58
Pinout and Signal Descriptions
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68HC(9)12D60 — Rev 4.0
MOTOROLA