MC68HC12D60 Datasheet, PDF (394/432 Pages) Motorola, Inc – Advance Information - Rev 4.0

Freescale Semiconductor, Inc.
Appendix: CGM Practical Aspects
Table 21-2. Suggested 8MHz Synthesis PLL Filter Elements (Acquisition Mode)
Reference
[MHz]
0.614
0.614
0.614
0.614
0.8
0.8
0.8
0.8
1
1
1
1
1.6
1.6
1.6
1.6
2
2
2
2
2.66
2.66
2.66
2.66
4
4
4
4
SYNR Fbus [MHz] ^C₀ ^{[nF] R}₀ ^{[kΩ] C}_p ^[nF]
$0C
7.98
1000
0.43
100
$0C
7.98
47
2
4.7
$0C
7.98
10
4.3
1.0
$0C
7.98
3.3
7.5
0.33
$09
8.00
2200
0.27
220
$09
8.00
100
1.2
10
$09
8.00
22
2.4
2.2
$09
8.00
4.7
5.6
0.47
$07
8.00
2200
0.22
220
$07
8.00
100
1.0
10
$07
8.00
2.
2.2
2.2
$07
8.00
4.7
4.7
0.47
$05
8.00
3300
0.15
330
$05
8.00
100
0.82
10
$05
8.00
33
1.5
3.3
$05
8.00
10
2.7
1.0
$03
8.00
4700
0.1
470
$03
8.00
220
0.51
22
$03
8.00
47
1.0
4.7
$03
8.00
10
2.4
1.0
$02
8.00
2200
0.12
220
$02
8.00
220
0.43
22
$02
8.00
47
1.0
4.7
$02
8.00
10
2
1.0
$01
8.00
2200
0.1
220
$01
8.00
330
0.27
33
$01
8.00
100
0.51
10
$01
8.00
22
1.0
2.2
Loop
Bandwidth
[kHz]
1.2
5.5
12
21
0.9
4.4
9.3
20.1
1
4.8
10.4
22.5
1.1
6.2
10.7
19.5
1
4.6
10
21.8
1.7
5.3
11.6
25.1
2.1
5.4
9.7
20.8
Bandwidth
Limit [kHz]
157
157
157
157
201
201
201
201
251
251
251
251
402
402
402
402
502
502
502
502
668
668
668
668
1005
1005
1005
1005
Advance Information
394
Appendix: CGM Practical Aspects
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68HC(9)12D60 — Rev 4.0
MOTOROLA