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MC68HC12D60 Datasheet, PDF (331/432 Pages) Motorola, Inc – Advance Information - Rev 4.0
Freescale Semiconductor, Inc.
Analog-to-Digital Converter
ATD Registers
CD, CC, CB, and CA — Channel Select for Conversion
Table 18-4. Multichannel Mode Result Register Assignment
S8CM CD
CC
CB
CA
Channel Signal
Result in ADRxx
if MULT = 1
0
0
AN0
ADRx0
0
1
AN1
0
0
0
1
0
AN2
ADRx1
ADRx2
1
1
AN3
ADRx3
0
0
AN4
ADRx0
0
1
AN5
0
0
1
1
0
AN6
ADRx1
ADRx2
1
1
AN7
ADRx3
0
0
Reserved
ADRx0
0
1
0
1
0
1
0
Reserved
Reserved
ADRx1
ADRx2
1
1
Reserved
ADRx3
0
0
VRH
ADRx0
0
1
0
1
1
VRL
1
0
(VRH + VRL)/2
ADRx1
ADRx2
1
1 TEST/Reserved
ADRx3
0
0
0
AN0
ADRx0
0
0
1
AN1
ADRx1
0
1
0
AN2
ADRx2
0
1
1
AN3
1
0
1
0
0
AN4
ADRx3
ADRx4
1
0
1
AN5
ADRx5
1
1
0
AN6
ADRx6
1
1
1
AN7
ADRx7
0
0
0
Reserved
ADRx0
0
0
1
Reserved
ADRx1
0
1
0
Reserved
ADRx2
0
1
1
1
1
1
0
0
Reserved
VRH
ADRx3
ADRx4
1
0
1
VRL
ADRx5
1
1
0
(VRH + VRL)/2
ADRx6
1
1
1 TEST/Reserved
ADRx7
Shaded bits are “don’t care” if MULT = 1 and the entire block of four or eight
channels make up a conversion sequence. When MULT = 0, all four bits (CD,
CC, CB, and CA) must be specified and a conversion sequence consists of
four or eight consecutive conversions of the single specified channel.
68HC(9)12D60 — Rev 4.0
MOTOROLA
Analog-to-Digital Converter
For More Information On This Product,
Go to: www.freescale.com
Advance Information
331