M2S050TS-1FGG144YI Datasheet, PDF (39/156 Pages) Microsemi Corporation – SmartFusion2 System-on-Chip FPGAs

ADVANCE INFORMATION (Subject to Change)
SmartFusion2 System-on-Chip FPGAs
Table 2-16 • I/O Weak Pull-Up/Pull-Down Resistances for MSIOD I/O Bank
Minimum and Maximum Weak Pull-Up/Pull-Down Resistance Values at VOH/VOL
Level
VDDI
Domain
R(WEAK PULL-UP) at VOH (Ω) R(WEAK PULL-DOWN) at VOL (Ω)
Min.
Max.
Min.
Max.
Notes
3.3 V
N/A
N/A
N/A
N/A
–
2.5 V
9.6 K
14.1 K
9.5 K
13.9 K
1, 2
1.8 V
9.7 K
14.7 K
9.7 K
14.5 K
1, 2
1.5 V
9.9 K
15.3 K
9.8 K
15 K
1, 2
1.2 V
10.3 K
16.7 K
10 K
16.2 K
1, 2
Notes:
1. R(WEAK PULL-DOWN) = (VOLspec)/I(WEAK PULL-DOWN MAX)
2. R(WEAK PULL-UP) = (VDDImax - VOHspec)/I(WEAK PULL-UP MIN)
Table 2-17 • Schmitt Trigger Input Hysteresis
Hysteresis Voltage Value for Schmitt Trigger Mode Input Buffers
Input Buffer Configuration
3.3 V LVTTL / LVCMOS / PCI / PCI-X
2.5 V LVCMOS
1.8 V LVCMOS
1.5 V LVCMOS
1.2 V LVCMOS
Hysteresis Value (typical, unless otherwise noted)
0.05 × VDDI (worst-case)
0.05 × VDDI (worst-case)
0.1 × VDDI (worst-case)
60 mV
20 mV
Revision 0
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