M2S050TS-1FGG144YI Datasheet, PDF (22/156 Pages) Microsemi Corporation – SmartFusion2 System-on-Chip FPGAs

ADVANCE INFORMATION (Subject to Change)
SmartFusion2 DC and Switching Characteristics
Theta-JA
Junction-to-ambient thermal resistance (θ_JA) is determined under standard conditions specified by
JEDEC (JESD-51), but it has little relevance in actual performance of the product. It should be used with
caution but is useful for comparing the thermal performance of one package to another.
The maximum power dissipation allowed is calculated using EQ 4.
Maximum Power Allowed
=
-^T---^J---⁽-^M----^A---^X---⁾---–-----^T----^A---⁽--^M---^A----^X---⁾
θ_JA
EQ 4
The absolute maximum junction temperature is 100°C. EQ 5 shows a sample calculation of the absolute
maximum power dissipation allowed for the M2S050T-FG896 package at commercial temperature and in
still air, where
θ_JA = 14.7°C/W (taken from Table 2-3 on page 2-3).
T_A = 85°C
Maximum Power Allowed
=
1_----0_---0_----°_--C_{------–-----}8_---5_----°_--C_---
14.7°C/W
=
1.088 W
EQ 5
The power consumption of a device can be calculated using the Microsemi SoC Products Group power
calculator. The device's power consumption must be lower than the calculated maximum power
dissipation by the package. If the power consumption is higher than the device's maximum allowable
power dissipation, a heat sink can be attached on top of the case, or the airflow inside the system must
be increased.
Theta-JB
Junction-to-board thermal resistance (θ_JB) measures the ability of the package to dissipate heat from the
surface of the chip to the PCB. As defined by the JEDEC (JESD-51) standard, the thermal resistance
from junction to board uses an isothermal ring cold plate zone concept. The ring cold plate is simply a
means to generate an isothermal boundary condition at the perimeter. The cold plate is mounted on a
JEDEC standard board with a minimum distance of 5.0 mm away from the package edge.
Theta-JC
Junction-to-case thermal resistance (θ_JC) measures the ability of a device to dissipate heat from the
surface of the chip to the top or bottom surface of the package. It is applicable for packages used with
external heat sinks. Constant temperature is applied to the surface in consideration and acts as a
boundary condition. This only applies to situations where all or nearly all of the heat is dissipated through
the surface in consideration.
2-4
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