MSP34X0G Datasheet, PDF (65/96 Pages) Micronas – Multistandard Sound Processor Family

PRELIMINARY DATA SHEET
MSP 34x0G
(Data: MSB first)
I2S_WS
SONY Mode
PHILIPS Mode
PHILIPS/SONY Mode programmable by MODUS[6]
I2S_CL
I2S_DAIN
Detail A
R LSB L MSB
16 bit left channel
Detail B
I2S_DAOUT _{R LSB L MSB}
16 bit left channel
F_I2SWS
SONY Mode
PHILIPS Mode
Detail C
L LSB R MSB
L LSB R MSB
16 bit right channel
16 bit right channel
R LSB L LSB
R LSB L LSB
Detail C
I2S_CL
F_I2SCL
T_I2SWS1
T_I2SWS2
I2S_WS as INPUT
T_I2S5
T_I2S6
I2S_WS as OUTPUT
Fig. 4–26: I²S bus timing diagram
Detail A,B
I2S_CL
I2S_DA_IN
I2S_DA_OUT
T_I2S1
T_I2S3
T_I2S2
T_I2S4
4.6.3.6. Analog Baseband Inputs and Outputs, AGNDC
Symbol
Parameter
Pin Name
Analog Ground
V_AGNDC0
AGNDC Open Circuit Voltage
(8-V Operation)
MSP34x0G version A1 to A4
MSP34x0G version B5 and later
AGNDC
AGNDC Open Circuit Voltage
(5-V Operation)
MSP34x0G version A1 to A4
MSP34x0G version B5 and later
R_outAGN
AGNDC Output Resistance
(8-V Operation)
AGNDC Output Resistance
(5-V Operation)
Analog Input Resistance
R_inSC
SCART Input Resistance
from T_A = 0 to 70 °C
SCn_IN_s¹⁾
R_inMONO
MONO Input Resistance
from T_A = 0 to 70 °C
MONO_IN
1) _{“n” means “1”, “2”, “3”, or “4”; “s” means “L” or “R”}
Min. Typ. Max. Unit
3.63 3.73 3.83 V
3.67 3.77 3.87 V
2.39 2.49 2.59 V
2.41 2.51 2.61 V
70
125
180
kΩ
47
83
120
kΩ
25
40
58
kΩ
15
24
35
kΩ
Test Conditions
R_load ≥ 10 MΩ
3 V ≤ V_AGNDC ≤ 4 V
f_signal = 1 kHz, I = 0.05 mA
f_signal = 1 kHz, I = 0.1 mA
MICRONAS INTERMETALL
65