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MSP34X0G Datasheet, PDF (38/96 Pages) Micronas – Multistandard Sound Processor Family
MSP 34x0G
PRELIMINARY DATA SHEET
3.3.2.7. Read Registers on I2C Subaddress 13hex
Table 3–12: Read Registers on I2C Subaddress 13hex
Register Function
Address
Name
QUASI-PEAK DETECTOR READOUT
00 19hex
00 1ahex
Quasi-Peak Detector Readout Left
Quasi-Peak Detector Readout Right
QPEAK_L
QPEAK_R
bit [15..0] 0hex... 7FFFhex values are 16 bit two’s complement (only positive)
MSP 34X0G VERSION READOUT REGISTERS
00 1Ehex MSP Hardware Version Code
MSP_HARD
bit [15..8] 02hex
MSP 34x0G - B6
A change in the hardware version code defines hardware optimizations that
may have influence on the chip’s behavior. The readout of this register is iden-
tical to the hardware version code in the chip’s imprint.
00 1Fhex
MSP Major Revision Code
MSP_REVISION
bit [7..0] 07hex
MSP 34x0G - B6
The major revision code of the MSP 34x0G is 7.
MSP Product Code
MSP_PRODUCT
bit [15..8] 00hex
0Ahex
1Ehex
28hex
32hex
MSP 3400G - B6
MSP 3410G - B6
MSP 3430G - B6
MSP 3440G - B6
MSP 3450G - B6
By means of the MSP-Product Code, the control processor is able to decide
which TV sound standards have to be considered.
MSP ROM Version Code
MSP_ROM
bit [7..0] 45hex
46hex
MSP 34x0G - B5
MSP 34x0G - B6
A change in the ROM version code defines internal software optimizations,
that may have influence on the chip’s behavior, e.g. new features may have
been included. While a software change is intended to create no compatibility
problems, customers that want to use the new functions can identify new
MSP 34x0G versions according to this number.
To avoid compatibility problems with MSP 3410B and MSP 34x0D, an offset of
40hex is added to the ROM version code of the chip’s imprint.
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