MSP34X0G Datasheet, PDF (50/96 Pages) Micronas – Multistandard Sound Processor Family

MSP 34x0G
4.4. Pin Configurations
ADR_WS
NC
ADR_DA
I2S_DA_IN1
I2S_DA_OUT
I2S_WS
I2S_CL
I2C_DA
I2C_CL
ADR_CL
DVSUP
DVSS
I2S_DA_IN2
NC
NC
NC
RESETQ
NC
STANDBYQ
ADR_SEL
D_CTR_I/O_0
D_CTR_I/O_1
NC
NC
NC
AUD_CL_OUT
TP
XTAL_OUT
XTAL_IN
TESTEN
ANA_IN2+
ANA_IN−
ANA_IN1+
AVSUP
9 8 7 6 5 4 3 2 1 68 67 66 65 64 63 62 61
10
60
11
59
12
58
13
57
14
56
15
55
16
54
17
53
18
MSP 34x0G
52
19
51
20
50
21
49
22
48
23
47
24
46
25
45
26
44
27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43
DACA_R
DACA_L
VREF2
DACM_R
DACM_L
NC
DACM_SUB
NC
NC
SC2_OUT_R
SC2_OUT_L
VREF1
SC1_OUT_R
SC1_OUT_L
CAPL_A
AHVSUP
CAPL_M
AVSS
MONO_IN
VREFTOP
SC1_IN_R
SC1_IN_L
ASG1
SC2_IN_R
SC2_IN_L
AHVSS
AGNDC
NC
SC4_IN_L
SC4_IN_R
ASG4
SC3_IN_L
SC3_IN_R
ASG2
Fig. 4–6: 68-pin PLCC package
PRELIMINARY DATA SHEET
50
MICRONAS INTERMETALL