MSP34X0G Datasheet, PDF (16/96 Pages) Micronas – Multistandard Sound Processor Family

MSP 34x0G
PRELIMINARY DATA SHEET
Table 3–1: I²C Bus Device Addresses
ADR_SEL
Mode
MSP device address
Write
80 hex
Low
Read
81 hex
Write
84 hex
High
Read
85 hex
Left Open
Write
Read
88 hex
89 hex
Table 3–2: I²C Bus Subaddresses
Name
CONTROL
TEST
WR_DEM
RD_DEM
WR_DSP
RD_DSP
Binary Value
0000 0000
0000 0001
0001 0000
0001 0001
0001 0010
0001 0011
Hex Value
00
01
10
11
12
13
Mode
Read/Write
Write
Write
Write
Write
Write
Function
Write: Software reset of MSP (see Table 3–3)
Read: Hardware error status of MSP
only for internal use
write address demodulator
read address demodulator
write address DSP
read address DSP
3.1.2. Description of CONTROL Register
Table 3–3: CONTROL as a Write Register
Name
Subaddress
CONTROL 00 hex
Bit[15] (MSB)
1 : RESET
0 : normal
Bits[14:0]
0
Table 3–4: CONTROL as a Read Register (only MSP 34x0G-versions from B6 on)
Name
Subaddress Bit[15] (MSB)
Bit[14]
Bits[13:0]
CONTROL 00 hex
Reset status after last reading of CONTROL:
0 : no reset occured
1 : reset occured
Internal hardware status:
0 : no error occured
1 : internal error occured
not of interest
Reading of CONTROL will reset the bits[15,14] of CONTROL. After Power-on, bit[15] of CONTROL will be set; it must be
read once to be resetted.
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