MT41J128M16HA-15EDTR Datasheet, PDF (35/211 Pages) Micron Technology – DDR3 SDRAM MT41J512M4 – 64 Meg x 4 x 8 Banks MT41J256M8 – 32 Meg x 8 x 8 Banks MT41J128M16 – 16 Meg x 16 x 8 Banks

2Gb: x4, x8, x16 DDR3 SDRAM
Electrical Specifications – I_DD Specifications and Conditions
Table 14: I_DD4R Measurement Loop
0
1
2
3
0
4
5
6
7
1
8–15
2
16–23
3
24–31
4
32–39
5
40–47
6
48–55
7
56–63
RD
0 1 0 1 0 0 0 0 0 0 0 00000000
D
10000000000
–
D#
11110000000
–
D#
11110000000
–
RD
0 1 0 1 0 0 0 0 0 F 0 00110011
D
100000000F0
–
D#
111100000F0
–
D#
111100000F0
–
Repeat sub-loop 0, use BA[2:0] = 1
Repeat sub-loop 0, use BA[2:0] = 2
Repeat sub-loop 0, use BA[2:0] = 3
Repeat sub-loop 0, use BA[2:0] = 4
Repeat sub-loop 0, use BA[2:0] = 5
Repeat sub-loop 0, use BA[2:0] = 6
Repeat sub-loop 0, use BA[2:0] = 7
Notes:
1. DQ, DQS, DQS# are midlevel when not driving in burst sequence.
2. DM is LOW.
3. Burst sequence is driven on each DQ signal by the RD command.
4. All banks open.
PDF: 09005aef826aaadc
2Gb_DDR3_SDRAM.pdf - Rev. Q 04/13 EN
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