N25Q032A13ESE40F Datasheet, PDF (15/82 Pages) Micron Technology – SPI-compatible serial bus interface

32Mb, 3V, Multiple I/O Serial Flash Memory
Device Protection
Table 5: Protected Area Sizes – Upper Area (Continued)
Note 1 applies to the entire table
Status Register Content
Top/
Bottom
Bit
BP2
BP1
BP0
0
1
1
0
0
1
1
1
Memory Content
Protected Area
Upper half
All sectors
Unprotected Area
Sectors (0 to 31)
None
Note: 1. See the Status Register for details on the top/bottom bit and the BP 2:0 bits.
Table 6: Protected Area Sizes – Lower Area
Note 1 applies to the entire table
Status Register Content
Top/
Bottom
Bit
BP2
BP1
BP0
1
0
0
0
1
0
0
1
1
0
1
0
1
0
1
1
1
1
0
0
1
1
0
1
1
1
1
0
1
1
1
1
Memory Content
Protected Area
None
Lower 64th
Lower 32th
Lower 16th
Lower 8th
Lower 4th
Lower half
All sectors
Unprotected Area
All sectors
Sectors (1 to 63)
Sectors (2 to 63)
Sectors (4 to 63)
Sectors (8 to 63)
Sectors (16 to 63)
Sectors (32 to 63)
None
Note: 1. See the Status Register for details on the top/bottom bit and the BP 2:0 bits.
PDF: 09005aef84566622
n25q_32mb_3v_65nm.pdf - Rev. G 9/12 EN
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