PIC16F72-E Datasheet, PDF (9/136 Pages) Microchip Technology – 28-Pin, 8-Bit CMOS FLASH Microcontoller with A/D Converter

2.0 MEMORY ORGANIZATION
There are two memory blocks in the PIC16F72 device.
These are the program memory and the data memory.
Each block has separate buses so that concurrent
access can occur. Program memory and data memory
are explained in this section. Program memory can be
read internally by the user code (see Section 7.0).
The data memory can further be broken down into the
general purpose RAM and the Special Function
Registers (SFRs). The operation of the SFRs that
control the “core” are described here. The SFRs used
to control the peripheral modules are described in the
section discussing each individual peripheral module.
Additional information on device memory may be found
in the PIC™ Mid-Range Reference Manual,
(DS33023).
2.1 Program Memory Organization
PIC16F72 devices have a 13-bit program counter capa-
ble of addressing a 8K x 14 program memory space.
The address range for this program memory is 0000h -
07FFh. Accessing a location above the physically
implemented address will cause a wraparound.
The RESET Vector is at 0000h and the Interrupt Vector
is at 0004h.
FIGURE 2-1:
PROGRAM MEMORY MAP
AND STACK
PC<12:0>
CALL, RETURN
RETFIE, RETLW
13
Stack Level 1
Stack Level 8
RESET Vector
0000h
PIC16F72
2.2 Data Memory Organization
The Data Memory is partitioned into multiple banks that
contain the General Purpose Registers and the Special
Function Registers. Bits RP1 (STATUS<6>) and RP0
(STATUS<5>) are the bank select bits.
RP1:RP0
00
01
10
11
Bank
0
1
2
3
Each bank extends up to 7Fh (128 bytes). The lower
locations of each bank are reserved for the Special
Function Registers. Above the Special Function Regis-
ters are General Purpose Registers, implemented as
static RAM.
All implemented banks contain SFRs. Some “high use”
SFRs from one bank may be mirrored in another bank,
for code reduction and quicker access (e.g., the
STATUS register is in Banks 0 - 3).
2.2.1
GENERAL PURPOSE REGISTER
FILE
The register file can be accessed either directly, or indi-
rectly, through the File Select Register FSR (see
Section 2.5).
Interrupt Vector
On-chip Program
Memory
0004h
0005h
07FFh
0800h
1FFFh
© 2007 Microchip Technology Inc.
DS39597C-page 7