PIC16F72-E Datasheet, PDF (103/136 Pages) Microchip Technology – 28-Pin, 8-Bit CMOS FLASH Microcontoller with A/D Converter

PIC16F72
TABLE 14-6: SPI MODE REQUIREMENTS
Param
No.
Symbol
Characteristic
Min
Typ† Max Units Conditions
70* TssL2scH, SS↓ to SCK↓ or SCK↑ input
TssL2scL
TCY
— — ns
71* TscH
SCK input high time (Slave mode)
TCY + 20 — — ns
72* TscL
SCK input low time (Slave mode)
TCY + 20 — — ns
73* TdiV2scH, Setup time of SDI data input to SCK edge
TdiV2scL
100
— — ns
74* TscH2diL, Hold time of SDI data input to SCK edge
TscL2diL
100
— — ns
75* TdoR
SDO data output rise time
Standard(F)
—
Extended(LF)
—
10 25 ns
25 50 ns
76* TdoF
SDO data output fall time
—
10 25 ns
77* TssH2doZ SS↑ to SDO output hi-impedance
10
— 50 ns
78* TscR
SCK output rise time
(Master mode)
Standard(F)
—
Extended(LF)
—
10 25 ns
25 50 ns
79* TscF
SCK output fall time (Master mode)
—
10 25 ns
80* TscH2doV, SDO data output valid after
Standard(F)
—
TscL2doV SCK edge
Extended(LF)
—
— 50 ns
— 145 ns
81* TdoV2scH, SDO data output setup to SCK edge
TdoV2scL
TCY
— — ns
82* TssL2doV SDO data output valid after SS↓ edge
—
— 50 ns
83* TscH2ssH, SS ↑ after SCK edge
TscL2ssH
1.5 TCY + 40 — — ns
* These parameters are characterized but not tested.
† Data in "Typ" column is at 5V, 25°C unless otherwise stated. These parameters are for design guidance
only and are not tested.
FIGURE 14-14: I²C BUS START/STOP BITS TIMING
SCL
SDA
91
90
93
92
START
Condition
Note: Refer to Figure 14-3 for load conditions.
STOP
Condition
© 2007 Microchip Technology Inc.
DS39597C-page 101