PIC16F72-E Datasheet, PDF (75/136 Pages) Microchip Technology – 28-Pin, 8-Bit CMOS FLASH Microcontoller with A/D Converter

12.0 INSTRUCTION SET SUMMARY
Each PIC16F72 instruction is a 14-bit word divided into
an OPCODE that specifies the instruction type and one
or more operands that further specify the operation of
the instruction. The PIC16F72 instruction set summary
in Table 12-2 lists byte-oriented, bit-oriented, and lit-
eral and control operations. Table 12-1 shows the
opcode field descriptions.
For byte-oriented instructions, ‘f’ represents a file reg-
ister designator and ‘d’ represents a destination desig-
nator. The file register designator specifies which file
register is to be used by the instruction.
The destination designator specifies where the result of
the operation is to be placed. If ‘d’ is zero, the result is
placed in the W register. If ‘d’ is one, the result is placed
in the file register specified in the instruction.
For bit-oriented instructions, ‘b’ represents a bit field
designator which selects the number of the bit affected
by the operation, while ‘f’ represents the number of the
file in which the bit is located.
For literal and control operations, ‘k’ represents an
eight or eleven-bit constant or literal value.
TABLE 12-1: OPCODE FIELD
DESCRIPTIONS
Field
Description
f Register file address (0x00 to 0x7F)
W Working register (accumulator)
b Bit address within an 8-bit file register
k Literal field, constant data or label
x Don't care location (= 0 or 1).
The assembler will generate code with x = 0. It is the
recommended form of use for compatibility with all
Microchip software tools.
d Destination select; d = 0: store result in W,
d = 1: store result in file register f.
Default is d = 1.
PC Program Counter
TO Time-out bit
PD Power-down bit
The instruction set is highly orthogonal and is grouped
into three basic categories:
• Byte-oriented operations
• Bit-oriented operations
• Literal and control operations
All instructions are executed within one single instruc-
tion cycle, unless a conditional test is true or the pro-
gram counter is changed as a result of an instruction.
In this case, the execution takes two instruction cycles,
with the second cycle executed as a NOP. One instruc-
tion cycle consists of four oscillator periods. Thus, for
an oscillator frequency of 4 MHz, the normal instruction
execution time is 1 μs. If a conditional test is true, or the
program counter is changed as a result of an
instruction, the instruction execution time is 2 μs.
© 2007 Microchip Technology Inc.
PIC16F72
Table 12-2 lists the instructions recognized by the
MPASM^TM assembler.
Figure 12-1 shows the general formats that the
instructions can have.
All examples use the following format to represent a
hexadecimal number:
0xhh
where h signifies a hexadecimal digit.
FIGURE 12-1:
GENERAL FORMAT FOR
INSTRUCTIONS
Byte-oriented file register operations
13
8 76
0
OPCODE
d
f (FILE #)
d = 0 for destination W
d = 1 for destination f
f = 7-bit file register address
Bit-oriented file register operations
13
10 9 7 6
0
OPCODE
b (BIT #) f (FILE #)
b = 3-bit bit address
f = 7-bit file register address
Literal and control operations
General
13
OPCODE
87
k = 8-bit immediate value
0
k (literal)
CALL and GOTO instructions only
13
11 10
0
OPCODE
k (literal)
k = 11-bit immediate value
A description of each instruction is available in the
PIC™ Mid-Range MCU Family Reference Manual
(DS33023).
DS39597C-page 73