PIC16F716-I-P Datasheet, PDF (70/136 Pages) Microchip Technology – 8-bit Flash-based Microcontroller with A/D Converter and Enhanced Capture/Compare/PWM

PIC16F716
9.8 Time-out Sequence
On power-up, the time-out sequence is as follows: First
PWRT time-out is invoked after the POR time delay has
expired. Then OST is activated. The total time-out will
vary based on oscillator configuration and the status of
the PWRT. For example, in RC mode with the PWRT
disabled, there will be no time-out at all. Figure 9-10,
Figure 9-11, and Figure 9-12 depict time-out
sequences on power-up.
Since the time-outs occur from the POR pulse, if MCLR
is kept low long enough, the time-outs will expire. Then
bringing MCLR high will begin execution immediately
(Figure 9-12). This is useful for testing purposes or to
synchronize more than one PIC16F716 device
operating in parallel.
Table 9-5 shows the Reset conditions for some Special
Function Registers, while Table 9-6 shows the Reset
conditions for all the registers.
9.9 Power Control/STATUS Register
(PCON)
The Power Control/STATUS Register, PCON has two
bits.
Bit 0 is the Brown-out Reset Status bit, BOR. If the
BOREN Configuration bit is set, BOR is ‘1’ on
Power-on Reset and reset to ‘0’ when a Brown-out con-
dition occurs. BOR must then be set by the user and
checked on subsequent resets to see if it is clear, indi-
cating that another Brown-out has occurred.
If the BOREN Configuration bit is clear, BOR is
unknown on Power-on Reset.
Bit 1 is POR (Power-on Reset Status bit). It is cleared
on a Power-on Reset and unaffected otherwise. The
user must set this bit following a Power-on Reset.
TABLE 9-3: TIME-OUT IN VARIOUS SITUATIONS
Oscillator Configuration
Power-up or Brown-out
PWRTE = 0
PWRTE = 1
XT, HS, LP
RC
72 ms + 1024 TOSC
72 ms
1024 TOSC
—
Wake-up from Sleep
1024 TOSC
—
TABLE 9-4: STATUS BITS AND THEIR SIGNIFICANCE
POR BOR TO PD
0
x
1 1 Power-on Reset (BOREN = 0)
0
1
1 1 Power-on Reset (BOREN = 1)
0
x
0 x Illegal, TO is set on POR
0
x
x 0 Illegal, PD is set on POR
1
0
1 1 Brown-out Reset
1
1
0 1 WDT Reset
1
1
0 0 WDT Wake-up
1
1
u u MCLR Reset during normal operation
1
1
1 0 MCLR Reset during Sleep or interrupt wake-up from Sleep
DS41206B-page 68
© 2007 Microchip Technology Inc.