PIC24F08KA102-I Datasheet, PDF (42/278 Pages) Microchip Technology – 20/28-Pin General Purpose, 16-Bit Flash Microcontrollers with nanoWatt XLP Technology

PIC24F16KA102 FAMILY
TABLE 4-24: PROGRAM SPACE ADDRESS CONSTRUCTION
Access Type
Instruction Access
(Code Execution)
TBLRD/TBLWT
(Byte/Word Read/Write)
Access
Space
User
User
Configuration
Program Space Address
<23>
<22:16>
<15>
<14:1>
<0>
0
PC<22:1>
0
0xx xxxx xxxx xxxx xxxx xxx0
TBLPAG<7:0>
Data EA<15:0>
0xxx xxxx
TBLPAG<7:0>
xxxx xxxx xxxx xxxx
Data EA<15:0>
1xxx xxxx
xxxx xxxx xxxx xxxx
Program Space Visibility User
(Block Remap/Read)
0
PSVPAG<7:0>⁽²⁾
Data EA<14:0>⁽¹⁾
0
xxxx xxxx
xxx xxxx xxxx xxxx
Note 1: Data EA<15> is always ‘1’ in this case, but is not used in calculating the program space address. Bit 15 of
the address is PSVPAG<0>.
2: PSVPAG can have only two values (‘00’ to access program memory and FF to access data EEPROM) on
the PIC24F16KA102 family.
FIGURE 4-5:
DATA ACCESS FROM PROGRAM SPACE ADDRESS GENERATION
Program Counter⁽¹⁾
Table Operations⁽²⁾
0
Program Counter
0
23 Bits
1/0
TBLPAG
8 Bits
EA
1/0
16 Bits
24 Bits
Select
1
EA
0
Program Space Visibility⁽¹⁾
(Remapping)
0
PSVPAG
8 Bits
15 Bits
23 Bits
User/Configuration
Space Select
Byte Select
Note 1:
2:
The LSb of program space addresses is always fixed as ‘0’ in order to maintain word alignment of data in the
program and data spaces.
Table operations are not required to be word-aligned. Table read operations are permitted in the configuration
memory space.
DS39927C-page 42
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