PIC24F08KA102-I Datasheet, PDF(227/278 Page) Microchip Technology – 20/28-Pin General Purpose, 16-Bit Flash Microcontrollers with nanoWatt XLP Technology

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PIC24F08KA102-I Datasheet, PDF (227/278 Pages) Microchip Technology – 20/28-Pin General Purpose, 16-Bit Flash Microcontrollers with nanoWatt XLP Technology

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PIC24F16KA102 FAMILY

TABLE 29-9: DC CHARACTERISTICS: I/O PIN INPUT SPECIFICATIONS

DC CHARACTERISTICS

Standard Operating Conditions: 1.8V to 3.6V (unless otherwise stated)

Operating temperature -40Â°C ï£ TA ï£ +85Â°C for Industrial

-40Â°C ï£ TA ï£ +125Â°C for Extended

Param

No.

Sym

Characteristic

Min

Typ(1) Max Units

Conditions

VIL Input Low Voltage(4)

â

â

â

â

DI10

I/O Pins

VSS

â

0.2 VDD

V

DI15

MCLR

VSS

â

0.2 VDD

V

DI16

OSCI (XT mode)

VSS

â

0.2 VDD

V

DI17

DI18

OSCI (HS mode)

VSS

I/O Pins with I2Câ¢ Buffer

VSS

â

0.2 VDD

V

â 0.3 VDD V SMBus disabled

DI19

I/O Pins with SMBus Buffer VSS

â

0.8

V SMBus enabled

VIH(5) Input High Voltage(4)

â

â

â

â

DI20

I/O Pins:

with Analog Functions

0.8 VDD

â

VDD

V

Digital Only

0.8 VDD

â

VDD

V

DI25

MCLR

0.8 VDD

â

VDD

V

DI26

OSCI (XT mode)

0.7 VDD

â

VDD

V

DI27

DI28

OSCI (HS mode)

0.7 VDD

â

VDD

V

I/O Pins with I2C Buffer:

with Analog Functions

0.7 VDD

â

VDD

V

Digital Only

0.7 VDD

â

VDD

V

DI29

I/O Pins with SMBus

2.1

â

VDD

V 2.5V ï£ VPIN ï£ VDD

DI30 ICNPU CNx Pull-up Current

50

250

500

ïA VDD = 3.3V, VPIN = VSS

IIL

Input Leakage

Current(2,3)

DI50

I/O Ports

â

0.050 Â±0.100 ïA VSS ï£ VPIN ï£ VDD,

Pin at high-impedance

DI51

VREF+, VREF-, AN0, AN1

â

0.300 Â±0.500 ïA VSS ï£ VPIN ï£ VDD,

Pin at high-impedance

DI55

MCLR

â

â

Â±5.0

ïA VSSï ï£ VPINï ï£ VDD

DI56

OSCI

â

â

Â±5.0

ïA VSSï ï£ VPIN ï£ï VDD,

XT and HS modes

Note 1: Data in âTypâ column is at 3.3V, 25Â°C unless otherwise stated. Parameters are for design guidance only

and are not tested.

2: The leakage current on the MCLR pin is strongly dependent on the applied voltage level. The specified

levels represent normal operating conditions. Higher leakage current may be measured at different input

voltages.

3: Negative current is defined as current sourced by the pin.

4: Refer to Table 1-2 for I/O pin buffer types.

5: VIH requirements are met when internal pull-ups are enabled.

ï£ 2008-2011 Microchip Technology Inc.

DS39927C-page 227

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