PIC24HJ128GP206-I Datasheet, PDF (203/286 Pages) Microchip Technology – High-Performance, 16-Bit Microcontrollers

PIC24HJXXXGPX06/X08/X10
19.0 10-BIT/12-BIT A/D CONVERTER
Note:
This data sheet summarizes the features
of
this
group
of PIC24HJXXXGPX06/X08/X10 devices.
It is not intended to be a comprehensive
reference source. To complement the
information in this data sheet, refer to the
“PIC24H Family Reference Manual”.
Refer to the Microchip web site
(www.microchip.com) for the latest
PIC24H Family Reference Manual
sections.
The PIC24HJXXXGPX06/X08/X10 devices have up to
32 A/D input channels. These devices also have up to
2 A/D converter modules (ADCx, where ‘x’ = 1 or 2),
each with its own set of Special Function Registers.
The AD12B bit (ADxCON1<10>) allows each of the
A/D modules to be configured by the user as either a
10-bit, 4-sample/hold A/D (default configuration) or a
12-bit, 1-sample/hold A/D.
Note: The A/D module needs to be disabled
before modifying the AD12B bit.
19.1 Key Features
The 10-bit A/D configuration has the following key
features:
• Successive Approximation (SAR) conversion
• Conversion speeds of up to 1.1 Msps
• Up to 32 analog input pins
• External voltage reference input pins
• Simultaneous sampling of up to four analog input
pins
• Automatic Channel Scan mode
• Selectable conversion trigger source
• Selectable Buffer Fill modes
• Two result alignment options (signed/unsigned)
• Operation during CPU Sleep and Idle modes
The 12-bit A/D configuration supports all the above
features, except:
• In the 12-bit configuration, conversion speeds of
up to 500 ksps are supported
• There is only 1 sample/hold amplifier in the 12-bit
configuration, so simultaneous sampling of
multiple channels is not supported.
Depending on the particular device pinout, the A/D con-
verter can have up to 32 analog input pins, designated
AN0 through AN31. In addition, there are two analog
input pins for external voltage reference connections.
These voltage reference inputs may be shared with
other analog input pins. The actual number of analog
input pins and external voltage reference input config-
uration will depend on the specific device. Refer to the
device data sheet for further details.
A block diagram of the A/D converter is shown in
Figure 19-1.
19.2 A/D Initialization
The following configuration steps should be performed.
1. Configure the A/D module:
a) Select port pins as analog inputs
(ADxPCFGH<15:0> or ADxPCFGL<15:0>)
b) Select voltage reference source to match
expected range on analog inputs
(ADxCON2<15:13>)
c) Select the analog conversion clock to
match desired data rate with processor
clock (ADxCON3<5:0>)
d) Determine how many S/H channels will
be used (ADxCON2<9:8> and
ADxPCFGH<15:0> or ADxPCFGL<15:0>)
e) Select the appropriate sample/conversion
sequence
(ADxCON1<7:5>
and
ADxCON3<12:8>)
f) Select how conversion results are
presented in the buffer (ADxCON1<9:8>)
g) Turn on A/D module (ADxCON1<15>)
2. Configure A/D interrupt (if required):
a) Clear the ADxIF bit
b) Select A/D interrupt priority
19.3 ADC and DMA
If more than one conversion result needs to be buffered
before triggering an interrupt, DMA data transfers can
be used. Both ADC1 and ADC2 can trigger a DMA data
transfer. If ADC1 or ADC2 is selected as the DMA IRQ
source, a DMA transfer occurs when the AD1IF or
AD2IF bit gets set as a result of an ADC1 or ADC2
sample conversion sequence.
The SMPI<3:0> bits (ADxCON2<5:2>) are used to
select how often the DMA RAM buffer pointer is
incremented.
The ADDMABM bit (ADxCON1<12>) determines how
the conversion results are filled in the DMA RAM buffer
area being used for ADC. If this bit is set, DMA buffers
are written in the order of conversion. The module will
provide an address to the DMA channel that is the
same as the address used for the non-DMA
stand-alone buffer. If the ADDMABM bit is cleared, then
DMA buffers are written in Scatter/Gather mode. The
module will provide a scatter/gather address to the
DMA channel, based on the index of the analog input
and the size of the DMA buffer.
© 2007 Microchip Technology Inc.
DS70175F-page 201