PIC24HJ128GP206-I Datasheet, PDF (167/286 Pages) Microchip Technology – High-Performance, 16-Bit Microcontrollers

PIC24HJXXXGPX06/X08/X10
17.2 Transmitting in 8-bit Data Mode
1. Set up the UART:
a) Write appropriate values for data, parity and
Stop bits.
b) Write appropriate baud rate value to the
BRGx register.
c) Set up transmit and receive interrupt enable
and priority bits.
2. Enable the UART.
3. Set the UTXEN bit (causes a transmit interrupt).
4. Write data byte to lower byte of UxTXREG word.
The value will be immediately transferred to the
Transmit Shift Register (TSR) and the serial bit
stream will start shifting out with the next rising
edge of the baud clock.
5. Alternately, the data byte may be transferred
while UTXEN = 0, and then the user may set
UTXEN. This will cause the serial bit stream to
begin immediately because the baud clock will
start from a cleared state.
6. A transmit interrupt will be generated as per
interrupt control bits, UTXISEL<1:0>.
17.3 Transmitting in 9-bit Data Mode
1. Set up the UART (as described in Section 17.2
“Transmitting in 8-bit Data Mode”).
2. Enable the UART.
3. Set the UTXEN bit (causes a transmit interrupt).
4. Write UxTXREG as a 16-bit value only.
5. A word write to UxTXREG triggers the transfer
of the 9-bit data to the TSR. Serial bit stream will
start shifting out with the first rising edge of the
baud clock.
6. A transmit interrupt will be generated as per the
setting of control bits, UTXISEL<1:0>.
17.4 Break and Sync Transmit
Sequence
The following sequence will send a message frame
header made up of a Break, followed by an auto-baud
Sync byte.
1. Configure the UART for the desired mode.
2. Set UTXEN and UTXBRK – sets up the Break
character.
3. Load the UxTXREG register with a dummy
character to initiate transmission (value is
ignored).
4. Write 0x55 to UxTXREG – loads Sync character
into the transmit FIFO.
5. After the Break has been sent, the UTXBRK bit
is reset by hardware. The Sync character now
transmits.
17.5 Receiving in 8-bit or 9-bit Data
Mode
1. Set up the UART (as described in Section 17.2
“Transmitting in 8-bit Data Mode”).
2. Enable the UART.
3. A receive interrupt will be generated when one
or more data characters have been received as
per interrupt control bits, URXISEL<1:0>.
4. Read the OERR bit to determine if an overrun
error has occurred. The OERR bit must be reset
in software.
5. Read UxRXREG.
The act of reading the UxRXREG character will move
the next character to the top of the receive FIFO,
including a new set of PERR and FERR values.
17.6 Flow Control Using UxCTS and
UxRTS Pins
UARTx Clear to Send (UxCTS) and Request to Send
(UxRTS) are the two hardware controlled active-low
pins that are associated with the UART module. These
two pins allow the UART to operate in Simplex and
Flow Control modes. They are implemented to control
the transmission and the reception between the Data
Terminal Equipment (DTE). The UEN<1:0> bits in the
UxMODE register configures these pins.
17.7 Infrared Support
The UART module provides two types of infrared UART
support:
• IrDA clock output to support external IrDA
encoder and decoder device (legacy module
support)
• Full implementation of the IrDA encoder and
decoder.
17.7.1 EXTERNAL IrDA SUPPORT – IrDA
CLOCK OUTPUT
To support external IrDA encoder and decoder devices,
the BCLK pin (same as the UxRTS pin) can be
configured to generate the 16x baud clock. With
UEN<1:0> = 11, the BCLK pin will output the 16x baud
clock if the UART module is enabled; it can be used to
support the IrDA codec chip.
17.7.2 BUILT-IN IrDA ENCODER AND
DECODER
The UART has full implementation of the IrDA encoder
and decoder as part of the UART module. The built-in
IrDA encoder and decoder functionality is enabled
using the IREN bit (UxMODE<12>). When enabled
(IREN = 1), the receive pin (UxRX) acts as the input
from the infrared receiver. The transmit pin (UxTX) acts
as the output to the infrared transmitter.
© 2007 Microchip Technology Inc.
DS70175F-page 165