PIC24HJ128GP206-I Datasheet, PDF (114/286 Pages) Microchip Technology – High-Performance, 16-Bit Microcontrollers

PIC24HJXXXGPX06/X08/X10
REGISTER 7-2: DMAxREQ: DMA CHANNEL x IRQ SELECT REGISTER
R/W-0
U-0
U-0
U-0
U-0
U-0
U-0
FORCE⁽¹⁾
—
—
—
—
—
—
bit 15
U-0
—
bit 8
U-0
—
bit 7
R/W-0
R/W-0
R/W-0
U-0
IRQSEL6⁽²⁾ IRQSEL5⁽²⁾ IRQSEL4⁽²⁾ IRQSEL3⁽²⁾
U-0
IRQSEL2⁽²⁾
R/W-0
IRQSEL1⁽²⁾
R/W-0
IRQSEL0⁽²⁾
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 15
FORCE: Force DMA Transfer bit⁽¹⁾
1 = Force a single DMA transfer (Manual mode)
0 = Automatic DMA transfer initiation by DMA request
bit 14-7
bit 6-0
Unimplemented: Read as ‘0’
IRQSEL<6:0>: DMA Peripheral IRQ Number Select bits⁽²⁾
0000000-1111111 = DMAIRQ0-DMAIRQ127 selected to be Channel DMAREQ
Note 1: The FORCE bit cannot be cleared by the user. The FORCE bit is cleared by hardware when the forced
DMA transfer is complete.
2: Please see Table 6-1 for a complete listing of IRQ numbers for all interrupt sources.
DS70175F-page 112
© 2007 Microchip Technology Inc.