PIC24HJ128GP206-I Datasheet, PDF (148/286 Pages) Microchip Technology – High-Performance, 16-Bit Microcontrollers

PIC24HJXXXGPX06/X08/X10
To set up the SPI module for the Slave mode of operation:
1. Clear the SPIxBUF register.
2. If using interrupts:
a) Clear the SPIxIF bit in the respective IFSn
register.
b) Set the SPIxIE bit in the respective IECn
register.
c) Write the SPIxIP bits in the respective IPCn
register to set the interrupt priority.
3. Write the desired settings to the SPIxCON1 and
SPIxCON2 registers with MSTEN
(SPIxCON1<5>) = 0.
4. Clear the SMP bit.
5. If the CKE bit is set, then the SSEN bit
(SPIxCON1<7>) must be set to enable the SSx
pin.
6. Clear the SPIROV bit (SPIxSTAT<6>).
7. Enable SPI operation by setting the SPIEN bit
(SPIxSTAT<15>).
The SPI module generates an interrupt indicating com-
pletion of a byte or word transfer, as well as a separate
interrupt for all SPI error conditions.
Note:
Both SPI1 and SPI2 can trigger a DMA
data transfer. If SPI1 or SPI2 is selected
as the DMA IRQ source, a DMA transfer
occurs when the SPI1IF or SPI2IF bit gets
set as a result of an SPI1 or SPI2 byte or
word transfer.
FIGURE 15-1:
SPI MODULE BLOCK DIAGRAM
SCKx
SSx
SDOx
SDIx
Sync
Control
Control
Clock
Select
Edge
Shift Control
bit 0
SPIxSR
1:1 to 1:8
Secondary
Prescaler
1:1/4/16/64
Primary
FCY
Prescaler
SPIxCON1<1:0>
SPIxCON1<4:2>
Enable
Master Clock
Transfer
Transfer
SPIxRXB SPIxTXB
SPIxBUF
Read SPIxBUF
Write SPIxBUF
16
Internal Data Bus
DS70175F-page 146
© 2007 Microchip Technology Inc.