PIC24FV32KA304 Datasheet, PDF (203/322 Pages) Microchip Technology – 20/28/44/48-Pin, General Purpose, 16-Bit Flash Microcontrollers with XLP Technology

PIC24FV32KA304 FAMILY
20.0 32-BIT PROGRAMMABLE
CYCLIC REDUNDANCY CHECK
(CRC) GENERATOR
Note:
This data sheet summarizes the features of
this group of PIC24F devices. It is not
intended to be a comprehensive reference
source. For more information, refer to the
“PIC24F Family Reference Manual”,
Section 41. “32-Bit Programmable
Cyclic Redundancy Check (CRC)”
(DS39729).
FIGURE 20-1:
CRC BLOCK DIAGRAM
The programmable CRC generator provides a
hardware implemented method of quickly generating
checksums for various networking and security
applications. It offers the following features:
• User-programmable CRC polynomial equation,
up to 32 bits
• Programmable shift direction (little or big-endian)
• Independent data and polynomial lengths
• Configurable interrupt output
• Data FIFO
A simplified block diagram of the CRC generator is
shown in Figure 20-1. A simple version of the CRC shift
engine is shown in Figure 20-2.
CRCDATH
CRCDATL
2 * FCY Shift Clock
Variable FIFO
(4x32, 8x16 or 16x8)
FIFO Empty Event
CRCISEL
Shift Buffer
0 1 LENDIAN
1
Set CRCIF
0
CRC Shift Engine
Shift Complete Event
CRCWDATH CRCWDATL
FIGURE 20-2:
Shift Buffer
Data
CRC SHIFT ENGINE DETAIL
CRCWDATH
Read/Write Bus
X(1)⁽¹⁾
X(2)⁽¹⁾
Bit 0
Bit 1
Bit 2
CRCWDATL
X(n)⁽¹⁾
Bit n⁽²⁾
Note 1: Each XOR stage of the shift engine is programmable; see text for details.
2: Polynomial length n is determined by ([PLEN<3:0>] + 1)
 2011 Microchip Technology Inc.
DS39995A-page 203