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PIC24FV32KA304 Datasheet, PDF (190/322 Pages) Microchip Technology – 20/28/44/48-Pin, General Purpose, 16-Bit Flash Microcontrollers with XLP Technology | |||
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PIC24FV32KA304 FAMILY
19.2 RTCC Module Registers
The RTCC module registers are organized into three
categories:
⢠RTCC Control Registers
⢠RTCC Value Registers
⢠Alarm Value Registers
19.2.1 REGISTER MAPPING
To limit the register interface, the RTCC Timer and
Alarm Time registers are accessed through
corresponding register pointers. The RTCC Value
register window (RTCVALH and RTCVALL) uses the
RTCPTR bits (RCFGCAL<9:8>) to select the desired
Timer register pair (see Table 19-1).
By writing the RTCVALH byte, the RTCC Pointer value,
the RTCPTR<1:0> bits decrement by one until they
reach â00â. Once they reach â00â, the MINUTES and
SECONDS value will be accessible through RTCVALH
and RTCVALL until the pointer value is manually
changed.
TABLE 19-1: RTCVAL REGISTER MAPPING
RTCC Value Register Window
RTCPTR<1:0>
RTCVAL<15:8> RTCVAL<7:0>
00
MINUTES
SECONDS
01
WEEKDAY
HOURS
10
MONTH
DAY
11
â
YEAR
The Alarm Value register window (ALRMVALH and
ALRMVALL) uses the ALRMPTR bits
(ALCFGRPT<9:8>) to select the desired Alarm
register pair (see Table 19-2).
By writing the ALRMVALH byte, the Alarm Pointer
value (ALRMPTR<1:0> bits) decrements by one until
they reach â00â. Once they reach â00â, the ALRMMIN
and ALRMSEC value will be accessible through
ALRMVALH and ALRMVALL until the pointer value is
manually changed.
TABLE 19-2: ALRMVAL REGISTER
MAPPING
ALRMPTR
Alarm Value Register Window
<1:0>
ALRMVAL<15:8> ALRMVAL<7:0>
00
ALRMMIN
ALRMSEC
01
ALRMWD
ALRMHR
10
ALRMMNTH
ALRMDAY
11
PWCSTAB
PWCSAMP
Considering that the 16-bit core does not distinguish
between 8-bit and 16-bit read operations, the user must
be aware that when reading either the ALRMVALH or
ALRMVALL bytes, the ALRMPTR<1:0> value will be
decremented. The same applies to the RTCVALH or
RTCVALL bytes with the RTCPTR<1:0> being
decremented.
Note: This only applies to read operations and
not write operations.
19.2.2 WRITE LOCK
In order to perform a write to any of the RTCC Timer
registers, the RTCWREN bit (RTCPWC<13>) must be
set (see Example 19-1).
Note:
To avoid accidental writes to the timer, it is
recommended that the RTCWREN bit
(RCFGCAL<13>) is kept clear at any
other time. For the RTCWREN bit to be
set, there is only one instruction cycle time
window allowed between the 55h/AA
sequence and the setting of RTCWREN.
Therefore, it is recommended that code
follow the procedure in Example 19-1.
19.2.3 SELECTING RTCC CLOCK SOURCE
There are four reference source clock options that can
be selected for the RTCC using the RTCCSEL<1:0>
bits; 00 = secondary oscillator, 01 = LPRC, 10 = 50 Hz
external clock, and 11 = 60 Hz external clock.
EXAMPLE 19-1: SETTING THE RTCWREN BIT
asm volatile(âpush w7â);
asm volatile(âpush w8â);
asm volatile(âdisi #5â);
asm volatile(âmov #0x55, w7â);
asm volatile(âmov w7, _NVMKEYâ);
asm volatile(âmov #0xAA, w8â);
asm volatile(âmov w8, _NVMKEYâ);
asm volatile(âbset _RCFGCAL, #13â); //set the RTCWREN bit
asm volatile(âpop w8â);
asm volatile(âpop w7â);
DS39995A-page 190
ï£ 2011 Microchip Technology Inc.
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