PIC16F628-20P Datasheet, PDF (134/170 Pages) Microchip Technology – FLASH-Based 8-Bit CMOS Microcontroller

PIC16F62X
17.2 DC Characteristics: PIC16F62X (Commercial, Industrial, Extended)
PIC16LF62X (Commercial, Industrial)
DC CHARACTERISTICS
Standard Operating Conditions (unless otherwise stated)
Operating temperature
-40°C ≤ TA ≤ +85°C for industrial and
0°C ≤ TA ≤ +70°C for commercial and
-40°C ≤ TA ≤ +125°C for extended
Operating voltage VDD range as described in DC spec Table 17-1 and Table 17-2
Param.
No.
Sym
Characteristic/Device
Min
Typ†
Max
Unit
Conditions
VIL Input Low Voltage
D030
D031
D032
D033
I/O ports
with TTL buffer
with Schmitt Trigger input
MCLR, RA4/T0CKI,OSC1
(in ER mode)
OSC1 (in XT and HS)
OSC1 (in LP)
VSS
—
0.8
V VDD = 4.5V to 5.5V
0.15 VDD
V otherwise
VSS
0.2 VDD
V
VSS
—
0.2 VDD
V (Note1)
VSS
—
0.3 VDD
V
VSS
— 0.6 VDD - 1.0 V
VIH Input High Voltage
D040
D041
D042
D043
D043A
I/O ports
with TTL buffer
2.0V
—
VDD
V VDD = 4.5V to 5.5V
.25 VDD + 0.8V
VDD
V otherwise
with Schmitt Trigger input
0.8 VDD
—
VDD
V
MCLR RA4/T0CKI
0.8 VDD
—
VDD
V
OSC1 (XT, HS and LP)
0.7 VDD
—
VDD
V
OSC1 (in ER mode)
0.9 VDD
V (Note1)
D070
IPURB
IIL
PORTB weak pull-up
current
Input Leakage Current^{(2), (3)}
50
200
400
µA VDD = 5.0V, VPIN = VSS
D060
D061
D063
I/O ports (Except PORTA)
PORTA
RA4/T0CKI
OSC1, MCLR
±1.0
µA VSS ≤ VPIN ≤ VDD, pin at hi-impedance
—
—
±0.5
µA VSS ≤ VPIN ≤ VDD, pin at hi-impedance
—
—
±1.0
µA VSS ≤ VPIN ≤ VDD
—
—
±5.0
µA VSS ≤ VPIN ≤ VDD, XT, HS and LP osc
configuration
VOL Output Low Voltage
D080
D083
I/O ports
OSC2/CLKOUT (ER only)
VOH Output High Voltage⁽³⁾
—
—
0.6
V IOL=8.5 mA, VDD=4.5V, -40° to +85°C
—
—
0.6
V IOL=7.0 mA, VDD=4.5V, +125°C
—
—
0.6
V IOL=1.6 mA, VDD=4.5V, -40° to +85°C
—
—
0.6
V IOL=1.2 mA, VDD=4.5V, +125°C
D090
D092
I/O ports (Except RA4)
OSC2/CLKOUT (ER only)
VDD - 0.7
—
—
V IOH=-3.0 mA, VDD=4.5V, -40° to +85°C
VDD - 0.7
—
—
V IOH=-2.5 mA, VDD=4.5V, +125°C
VDD - 0.7
—
—
V IOH=-1.3 mA, VDD=4.5V, -40° to +85°C
VDD - 0.7
—
—
V IOH=-1.0 mA, VDD=4.5V, +125°C
D150
VOD Open-Drain High Voltage
—
8.5
V RA4 pin PIC16F62X, PIC16LF62X*
Capacitive Loading Specs on Output Pins
D100*
D101*
COSC2 OSC2 pin
Cio All I/O pins/OSC2 (in ER mode)
—
15
pF In XT, HS and LP modes when external
clock used to drive OSC1.
—
50
pF
* These parameters are characterized but not tested.
† Data in “Typ” column is at 5.0V, 25°C unless otherwise stated. These parameters are for design guidance only and are not tested.
Note 1: In ER oscillator configuration, the OSC1 pin is a Schmitt Trigger input. It is not recommended that the PIC16F62X be driven with exter-
nal clock in ER mode.
2: The leakage current on the MCLR pin is strongly dependent on applied voltage level. The specified levels represent normal operating
conditions. Higher leakage current may be measured at different input voltages.
3: Negative current is defined as coming out of the pin.
DS40300C-page 132
Preliminary
 2003 Microchip Technology Inc.