PIC16F676-I Datasheet, PDF (105/132 Pages) Microchip Technology – 14-Pin, Flash-Based 8-Bit CMOS Microcontrollers

PIC16F630/676
FIGURE 12-11: PIC16F676 A/D CONVERSION TIMING (SLEEP MODE)
BSF ADCON0, GO
134
Q4
A/D CLK
A/D DATA
(TOSC/2 + TCY)⁽¹⁾
9
8
131
130
76
3
2
1
1 TCY
0
ADRES
ADIF
GO
SAMPLE
132
OLD_DATA
SAMPLING STOPPED
NEW_DATA
1 TCY
DONE
Note 1: If the A/D clock source is selected as RC, a time of TCY is added before the A/D clock starts. This allows the
SLEEP instruction to be executed.
TABLE 12-10: PIC16F676 A/D CONVERSION REQUIREMENTS (SLEEP MODE)
Param
No.
130
130
131
132
Sym
TAD
TAD
TCNV
TACQ
Characteristic
A/D Clock Period
A/D Internal RC
Oscillator Period
Conversion Time
(not including
Acquisition Time)⁽¹⁾
Acquisition Time
Min
1.6
3.0*
3.0*
2.0*
—
(Note 2)
Typ†
—
—
6.0
4.0
11
11.5
Max Units
Conditions
—
s VREF 3.0V
—
s VREF full range
ADCS<1:0> = 11 (RC mode)
9.0* s At VDD = 2.5V
6.0* s At VDD = 5.0V
—
TAD
— s
5*
—
— s The minimum time is the amplifier
settling time. This may be used if
the “new” input voltage has not
changed by more than 1 LSb (i.e.,
4.1 mV @ 4.096V) from the last
sampled voltage (as stored on
CHOLD).
134
TGO Q4 to A/D Clock
Start
—
TOSC/2 + TCY —
— If the A/D clock source is selected
as RC, a time of TCY is added
before the A/D clock starts. This
allows the SLEEP instruction to be
executed.
* These parameters are characterized but not tested.
† Data in “Typ” column is at 5.0V, 25C unless otherwise stated. These parameters are for design guidance
only and are not tested.
Note 1: ADRES register may be read on the following TCY cycle.
2: See Table 7-1 for minimum conditions.
 2010 Microchip Technology Inc.
DS40039F-page 105