MAX11014 Datasheet, PDF(37/69 Page) Maxim Integrated Products – Automatic RF MESFET Amplifier Drain-Current Controllers

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MAX11014 Datasheet, PDF (37/69 Pages) Maxim Integrated Products – Automatic RF MESFET Amplifier Drain-Current Controllers

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Automatic RF MESFET Amplifier

Drain-Current Controllers

Set the LDAC1 bit, D5, to 1 to load the new value of

VDAC1, upon completion of a VDAC1(CODE) calculation,

into both the channel 1 DAC input and output registers.

Set to 0 to load the new value of VDAC1, upon comple-

tion of a VDAC1(CODE) calculation, to only the channel 1

DAC input register. Set the T1COMP1/0 bits, D4 and

D3, to control the channel 1 temperature LUT. See

Table 11a. Set the KSRC1-2/1/0 bits, D2, D1, and D0 to

control the channel 1 K parameter LUT. See Table 11b

and the SRAM LUTs section.

Set the channel 1/channel 2 DAC code by writing to the

respective channelâs DAC input registers, DAC input

and output registers, or VSET registers. Write to the

DAC input registers (Table 16) and use a subsequent

write to the software load DAC register (Table 21) to

control the timing of the update. Write to the DAC input

and output registers (Table 17) to set the DAC output

voltage code directly, independent of the software load

DAC register bits. Write to the VSET registers (Table 14)

to include LUT data in the DAC code. Writing to the

VSET registers triggers a VDAC(CODE) calculation by the

following equation:

VDAC(CODE) = VSET(CODE)(1 + LUTK[K] x LUTTEMP [TEMP])

where

VDAC(CODE) = The modified channel1/channel 2 12-bit

DAC code.

VSET(CODE) = The 12-bit DAC code written to the chan-

nel 1/channel 2 VSET registers.

LUTK[K] = The interpolated, fractional 12-bit K LUT

value. The K LUT data is derived from a variety of

sources, including the VSET register value, the K para-

meter register value, or various ADC channels. See the

SRAM LUTs section.

LUTTEMP[TEMP] = The interpolated, fractional 12-bit

twoâs-complement temperature LUT value. The tempera-

ture LUT data is derived from either internal or external

temperature values.See the SRAM LUTs section.

When the KSRC_-2/KSRC_-1/KSRC_-0 bits are set to

000 and T_COMP1/T_COMP0 bits are set to 00 or 01,

the VDAC(CODE) equation simplifies to:

VDAC(CODE) = VSET(CODE)

Note: This is a special case and will not trigger a

VGATE calculation unless a sample already exists. This

functionality should be accessed by the THRUDAC

registers.

For temperature samples or sampled KLUT sources to

automatically trigger VDAC(CODE) calculations, the ADC

must be configured to provide these samples.

Therefore, the ADC conversion register (Table 19) must

have the relevant channel bits set and the ADC must

be in a suitable clocking mode, regardless of the

ADCMON bit setting.

CHANNEL 1/CHANNEL 2 DAC

INPUT REGISTERS:

(IPDAC1/IPDAC2

THRUDAC1/THRUDAC2)

LDAC

VDAC CALCULATION

LDAC_ BITS

SET TO 1 IN

SCFG REGISTER

Figure 20. DAC Register Format

CHANNEL 1/CHANNEL 2 DAC

INPUT AND OUTPUT REGISTERS:

(THRUDAC1/

THRUDAC2)

CHANNEL 1/ CHANNEL 2 DAC

OUTPUT VOLTAGE

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